參數(shù)資料
型號(hào)： TS80L188EC-13
元件分類： 16位微控制器
英文描述： 16-Bit Microprocessor
中文描述： 16位微處理器
文件頁(yè)數(shù)： 54/57頁(yè)
文件大小： 585K
代理商： TS80L188EC-13
80C186EC/188EC, 80L186EC/188EC
INSTRUCTION SET SUMMARY
(Continued)
Function
Format
80C186EC
Clock
Cycles
80C188EC
Clock
Cycles
Comments
LOGIC
(Continued)
XOR
e
Exclusive or:
Reg/memory and register to either
0 0 1 1 0 0 d w
mod reg r/m
3/10
3/10
*
Immediate to register/memory
1 0 0 0 0 0 0 w
mod 1 1 0 r/m
data
data if w
e
1
4/16
4/16
*
Immediate to accumulator
0 0 1 1 0 1 0 w
data
data if w
e
1
3/4
3/4
8/16-bit
NOT
e
Invert register/memory
1 1 1 1 0 1 1 w
mod 0 1 0 r/m
3/10
3/10
*
STRING MANIPULATION
MOVS
e
Move byte/word
1 0 1 0 0 1 0 w
14
14
*
CMPS
e
Compare byte/word
1 0 1 0 0 1 1 w
22
22
*
SCAS
e
Scan byte/word
1 0 1 0 1 1 1 w
15
15
*
LODS
e
Load byte/wd to AL/AX
1 0 1 0 1 1 0 w
12
12
*
STOS
e
Store byte/wd from AL/AX
1 0 1 0 1 0 1 w
10
10
*
INS
e
Input byte/wd from DX port
0 1 1 0 1 1 0 w
14
14
OUTS
e
Output byte/wd to DX port
0 1 1 0 1 1 1 w
14
14
Repeated by count in CX (REP/REPE/REPZ/REPNE/REPNZ)
MOVS
e
Move string
1 1 1 1 0 0 1 0
1 0 1 0 0 1 0 w
8
a
8n
8
a
8n
*
CMPS
e
Compare string
1 1 1 1 0 0 1 z
1 0 1 0 0 1 1 w
5
a
22n
5
a
22n
*
SCAS
e
Scan string
1 1 1 1 0 0 1 z
1 0 1 0 1 1 1 w
5
a
15n
5
a
15n
*
LODS
e
Load string
1 1 1 1 0 0 1 0
1 0 1 0 1 1 0 w
6
a
11n
6
a
11n
*
STOS
e
Store string
1 1 1 1 0 0 1 0
1 0 1 0 1 0 1 w
6
a
9n
6
a
9n
*
INS
e
Input string
1 1 1 1 0 0 1 0
0 1 1 0 1 1 0 w
8
a
8n
8
a
8n
*
OUTS
e
Output string
1 1 1 1 0 0 1 0
0 1 1 0 1 1 1 w
8
a
8n
8
a
8n
*
CONTROL TRANSFER
CALL
e
Call:
Direct within segment
1 1 1 0 1 0 0 0
disp-low
disp-high
15
19
Register/memory
indirect within segment
1 1 1 1 1 1 1 1
mod 0 1 0 r/m
13/19
17/27
Direct intersegment
1 0 0 1 1 0 1 0
segment offset
23
31
segment selector
Indirect intersegment
1 1 1 1 1 1 1 1
mod 0 1 1 r/m
(mod
i
11)
38
54
JMP
e
Unconditional jump:
Short/long
1 1 1 0 1 0 1 1
disp-low
14
14
Direct within segment
1 1 1 0 1 0 0 1
disp-low
disp-high
14
14
Register/memory
indirect within segment
1 1 1 1 1 1 1 1
mod 1 0 0 r/m
11/17
11/21
Direct intersegment
1 1 1 0 1 0 1 0
segment offset
14
14
segment selector
Indirect intersegment
1 1 1 1 1 1 1 1
mod 1 0 1 r/m
(mod
i
11)
26
34
Shaded areas indicate instructions not available in 8086/8088 microsystems.
NOTE:
*
Clock cycles shown for byte transfers, for word operations, add 4 clock cycles for all memory transfers.
54
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