- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365967 > TSA5060A (NXP Semiconductors N.V.) 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer PDF資料下載
參數(shù)資料
| 型號(hào)： | TSA5060A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| 中文描述： | 1.3千兆赫的I2C控制的低相位噪聲頻率合成器總線 |
| 文件頁數(shù)： | 5/24頁 |
| 文件大?。?/td> | 119K |
| 代理商： | TSA5060A |
2000 Oct 24
5
Philips Semiconductors
Product specification
1.3 GHz I
2
C-bus controlled low phase
noise frequency synthesizer
TSA5060A
PINNING
SYMBOL
PIN
DESCRIPTION
CP
XTAL
XT/COMP
AS
SDA
SCL
P3
P2
P1
P0
ADC
V
CC
RFA
RFB
GND
DRIVE
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
charge pump output
crystal oscillator input
f
xtal
or f
comp
signal output
I
2
C-bus address selection input
I
2
C-bus serial data input/output
I
2
C-bus serial clock input
general purpose output Port 3
general purpose input/output Port 2
general purpose input/output Port 1
general purpose input/output Port 0
analog-to-digital converter input
supply voltage
RF signal input A
RF signal input B
ground
external NPN drive output
handbook, halfpage
TSA5060A
FCE718
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CP
XTAL
XT/COMP
AS
SDA
SCL
P3
P2
P1
P0
ADC
VCC
RFA
RFB
GND
DRIVE
Fig.2 Pin configuration.
FUNCTIONAL DESCRIPTION
The TSA5060A contains all the necessary elements
except a reference source, a loop filter and an external
NPN transistor to control a varicap tuned local oscillator
forming a phase locked loop frequency synthesized
source. The IC is designed in a high speed process with a
fast phase detector to allow a high comparison frequency
to reach a low phase noise level on the oscillator.
The block diagram is shown in Fig.1. The RF signal is
applied at pins RFA and RFB. The input preamplifier
provides a good sensitivity. The output of the preamplifier
is fed to the 17-bit programmable divider either through a
divide-by-two prescaler or directly. Because of the internal
high speed process, the RF divider is working at a
frequency up to 1.3 GHz, without the need for the
divide-by-two prescaler to be used.
The output of the 17-bit programmable divider f
DIV
is fed
into the phase comparator, where it is compared in both
phase and frequency with the comparison frequency f
comp
.
This frequency is derived from the signal present at
pin XTAL, f
xtal
, divided down in the reference divider. It is
possible either to connect a quartz crystal to pin XTAL and
then using the on-chip crystal oscillator, or to feed this pin
with a reference signal from an external source.
The reference divider can have a dividing ratio selected
from 16 different values between 2 and 320, including the
ratio 24 to cope with the offset requirement of the UK-DTT
system, see Table 8.
The output of the phase comparator drives the
charge pump and the loop amplifier section. This amplifier
requires the use of an external NPN transistor. Pin CP is
the output of the charge pump, and pin DRIVE is
connected to the base of the external transistor. This
transistor has its emitter grounded and the collector drives
the tuning voltage to the varicap diode of the Voltage
Controlled Oscillator (VCO). The loop filter has to be
connected between pin CP and the collector of the
external NPN transistor (see Fig.4).
It is also possible to drive another PLL synthesizer, or the
clock input of a digital demodulation IC, from
pin XT/COMP. It is possible to select by software either
f
xtal
, the crystal oscillator frequency or f
comp
, the frequency
present after the reference divider. It is also possible to
switch off this output, in case it is not used.
For test and alignment purposes, it is possible to release
the drive output to be able to apply an external voltage on
it, to select one of the three charge pump test modes, and
to monitor half the f
DIV
at Port P0. See Table 10 for all
possible modes.
Four open-collector output ports are provided on the IC for
general purpose; three of these can also be used as input
ports. A 3-bit ADC is also available.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSA5060AT | 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| TSA5060ATS | 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| TSA5511TD-T | IC ACEX 1K FPGA 10K 256-FBGA |
| TSA5512ATD-T | IC,FPGA,72-CELL,CMOS,QFP,208PIN,PLASTIC |
| TSA5512TD-T | IC ACEX 1K FPGA 10K 100-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSA5060AT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| TSA5060AT/C1,518 | 功能描述:IC SYNTH FREQ 1.3GHZ 16-SOIC RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| TSA5060AT/C2,118 | 制造商:NXP Semiconductors 功能描述: |
| TSA5060AT/C2,518 | 制造商:NXP Semiconductors 功能描述: |
| TSA5060ATS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。