- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄365967 > TSA5060A (NXP Semiconductors N.V.) 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer PDF資料下載
參數(shù)資料
| 型號： | TSA5060A |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| 中文描述： | 1.3千兆赫的I2C控制的低相位噪聲頻率合成器總線 |
| 文件頁數(shù)： | 6/24頁 |
| 文件大?。?/td> | 119K |
| 代理商： | TSA5060A |
2000 Oct 24
6
Philips Semiconductors
Product specification
1.3 GHz I
2
C-bus controlled low phase
noise frequency synthesizer
TSA5060A
The TSA5060A is controlled via the two-wire I
2
C-bus.
For programming, there is one 7-bit module address and
bit R/W for selecting READ or WRITE mode.
To be able to have more than one synthesizer in an
I
2
C-bussystem,oneoffourpossibleaddressesisselected
depending on the voltage applied at pin AS (see Table 3).
The TSA5060A fulfils the fast mode I
2
C-bus, according to
the Philips I
2
C-bus specification. The I
2
C-bus interface is
designed in such a way that pins SCL and SDA can be
connected either to 5 or 3.3 V pulled-up I
2
C-bus lines,
allowing the PLL synthesizer to be connected directly to
the bus lines of a 3.3 V microcontroller.
WRITE mode: R/W = 0
After the address transmission (first byte), data bytes can
be sent to the device (see Table 1). Four data bytes are
needed to fully program the TSA5060A. The bus
transceiver has an auto-increment facility that permits
programming of the TSA5060A within one single
transmission (address + 4 data bytes).
The TSA5060A can also be partly programmed on the
condition that the first data byte following the address is
byte 2 or 4. The meaning of the bits in the data bytes is
given in Table 1. The first bit of the first data byte indicates
whether byte 2 (first bit is logic 0) or byte 4 (first bit is
logic 1) will follow. Until an I
2
C-bus STOP condition is sent
by the controller, additional data bytes can be entered
without the need to re-address the device.
To allow a smooth frequency sweep for fine tuning, and
while the data of the dividing ratio of the main divider is in
data bytes 2, 3 and 4, it is necessary to change the
frequency to send the data bytes 2 to 5 in a repeated
sending, or to finish an incomplete transmission by a
STOP condition. Repeated sending of data bytes 2 and 3
without ending the transmission does not change the
dividing ratio. To illustrate, the following data sequences
will change the dividing ratio:
Bytes 2, 3, 4 and 5
Bytes 4, 5, 2 and 3
Bytes 2, 3, 4 and STOP
Bytes 4, 5, 2 and STOP
Bytes 2, 3 and STOP
Bytes 2 and STOP
Bytes 4 and STOP.
Table 1
Write data format
Note
1.
MSB is transmitted first.
BYTE
DESCRIPTION
MSB
(1)
LSB
CONTROL BIT
1
2
3
4
5
address
programmable divider
programmable divider
control data
control data
1
0
1
0
0
0
MA1
N10
N2
R2
P2/T2
MA0
N9
N1
R1
P1/T1
0
A
A
A
A
A
N14
N6
N16
C0
N13
N5
N15
XCE
N12
N4
PE
XCS
N11
N3
R3
P3
N8
N0
R0
N7
1
C1
P0/T0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TSA5060AT | 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| TSA5060ATS | 1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| TSA5511TD-T | IC ACEX 1K FPGA 10K 256-FBGA |
| TSA5512ATD-T | IC,FPGA,72-CELL,CMOS,QFP,208PIN,PLASTIC |
| TSA5512TD-T | IC ACEX 1K FPGA 10K 100-TQFP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TSA5060AT | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
| TSA5060AT/C1,518 | 功能描述:IC SYNTH FREQ 1.3GHZ 16-SOIC RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| TSA5060AT/C2,118 | 制造商:NXP Semiconductors 功能描述: |
| TSA5060AT/C2,518 | 制造商:NXP Semiconductors 功能描述: |
| TSA5060ATS | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz I2C-bus controlled low phase noise frequency synthesizer |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。