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參數(shù)資料
| 型號： | TSB12LV22PZP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| 中文描述： | OHCI的山貓基于PCI的1394主控制器 |
| 文件頁數(shù)： | 64/106頁 |
| 文件大小： | 605K |
| 代理商： | TSB12LV22PZP |
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5
–
8
5.1.3.2
Asynchronous Packet Receive With Headers and Trailer
Step 1:
Asynchronous packet is received through the receiver logic of the link core.
Step 2:
The header quadlets are loaded into their respective header registers AND routed to the
DM port without any buffering.
Step 3:
Packet data is routed directly to the DM port (no buffering performed).
Step 4:
Trailer quadlet is loaded into the trailer register at 48h.
CFR REGISTER
Step 1
Header0 Register at 38h
Trailer Register at 48h
LINK CORE
Transmitter
Receiver
Quadlet#0
Packet received
from 1394 bus
through the Phy
Header1 Register at 3Ch
Quadlet#1
Header2 Register at 40h
Quadlet#2
Header3 Register at 42h
Quadlet#3
Loaded only in
Block Receive
Data
Mover
Port
Step 4 (trailer quadlet)
Step 3 (packet data)
Step 2 (header quadlet)
Figure 5
–
10. Asynchronous Receive With Headers and Trailer
5.1.4
There are two ways (modes of operation) to transmit asynchronous data through the data mover:
Asynchronous Transmit
Asynchronous packet transmit with automatic header insertion.
Asynchronous packet transmit without automatic header insertion.
The difference between the two modes lies in the mechanism in which the header information is inserted
into the data stream. However, in both cases, the header information is always loaded into the link core
transmitter from the header registers.
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相關(guān)代理商/技術(shù)參數(shù) |
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| TSB12LV23 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:TSB12LV23 OHCI-Lynx PCI-Based IEEE 1394 Host Controller |
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| TSB12LV26-EP | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Military Enhanced Plastic OHCI-Lynx PCI-Based IEEE 1394 Host Controller |
| TSB12LV26IPZT | 功能描述:1394 接口集成電路 OHCI-Lynx PCI-Based Host Controller RoHS:否 制造商:Texas Instruments 類型:Link Layer Controller 工作電源電壓: 封裝 / 箱體:LQFP 封裝:Tray |
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