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參數(shù)資料
| 型號： | TSB12LV22PZP |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | OHCI-Lynx PCI-BASED IEEE 1394 HOST CONTROLLER |
| 中文描述： | OHCI的山貓基于PCI的1394主控制器 |
| 文件頁數(shù)： | 79/106頁 |
| 文件大?。?/td> | 605K |
| 代理商： | TSB12LV22PZP |
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7
–
1
7 TSB12LV32 Data Formats
The data formats for transmission and reception of data are shown in the following sections. The transmit
format describes the expected organization of data presented to the TSB12LV32 at the host-bus interface.
The receive formats describe the data format that the TSB12LV32 presents to the host-bus interface.
7.1
Asynchronous transmit refers to the use of the asynchronous-transmit FIFO (ATF) interface. The
general-receive FIFO (GRF) is shared by asynchronous data and isochronous data. There are two basic
formats for data to be transmitted and received. The first is for quadlet packets, and the second is for block
packets. For transmits, the FIFO address indicates the beginning, middle, and end of a packet. For receives,
the data length, which is found in the header of the packet, determines the number of bytes in a block packet.
Asynchronous Transmit (Host Bus to TSB12LV32)
7.1.1
The quadlet-transmit format is shown in Figure 7
–
1 and 7
–
2, are described in Table 7
–
1. The first quadlet
contains packet control information. The second and third quadlets contain the 64-bit, quadlet-aligned
address. The fourth quadlet is data used only for write requests and read responses. For read requests and
write responses, the quadlet data field is omitted.
Quadlet Transmit
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
17
16
20 21
31
30
29
28
27
26
25
24
23
22
prioity
tCode
rt
tLabel
spd
desinationOffsetHigh
destinationID
desinationOffsetLow
quadlet data
Figure 7
–
1. Quadlet-Transmit Format (Write Request)
3
2
1
0
7
6
5
4
11
10
9
8
15
14
13
12
19
18
17
16
20 21
31
30
29
28
27
26
25
24
23
22
prioity
tCode
rt
tLabel
spd
rCode
destinationID
quadlet data
Figure 7
–
2. Quadlet-Transmit Format (Read Response)
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