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參數(shù)資料
| 型號： | TSC2100IRHBRG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 44/77頁 |
| 文件大?。?/td> | 1079K |
| 代理商： | TSC2100IRHBRG4 |
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TSC2100
SLAS378 NOVEMBER 2003
www.ti.com
49
REGISTER 04H: Audio Control 2
BIT
NAME
READ/
WRITE
RESET
VALUE
FUNCTION
D15
KCLEN
R/W
0
Keyclick Enable
0 => Keyclick disabled
1 => Keyclick enabled
Note: This bit is automatically cleared after giving out the keyclick signal length equal to the
programmed value.
D14D12
KCLAC
R/W
100
Keyclick Amplitude Control
000 => Lowest amplitude
100 => Medium amplitude
111 => Highest amplitude
D11
APGASS
R/W
0
ADC Channel PGA Soft-stepping control
0 => 0.5dB change every ADWS
1 => 0.5dB change every 2 ADWS
Note: When AGC is enabled, this bit is read only. The read values indicate the following
0 => signal power greater than noise threshold
1 => signal power is less than noise threshold
D10D8
KCLFRQ
R/W
100
Keyclick Frequency
000 => 62.5Hz
001 => 125Hz
010 => 250Hz
011 => 500Hz
100 => 1kHz
101 => 2kHz
110 => 4kHz
111 => 8kHz
D7D4
KCLLN
R/W
0001
Keyclick Length
0000 => 2 periods key click
0001 => 4 periods key click
0010 => 6 periods key click
1110 => 30 periods key click
1111 => 32 periods key click
D3
DLGAF
R
0
DAC Left Channel PGA Flag ( Read Only )
0 => Gain applied /= PGA register setting
1 => Gain applied = PGA register setting.
Note: This flag indicates when the soft-stepping for DAC left channel is completed
D2
DRGAF
R
0
DAC Right Channel PGA Flag ( Read Only )
0 => Gain applied /= PGA register setting
1 => Gain applied = PGA register setting.
Note: This flag indicates when the soft-stepping for DAC right channel is completed
D1
DASTC
R/W
0
DAC Channel PGA Soft-stepping control
0 => 0.5dB change every LRCK
1 => 0.5dB change every 2 LRCK
D0
ADGAF
R
0
ADC Channel PGA Flag ( Read Only )
1 => Gain applied = PGA register setting.
0 => Gain applied /= PGA register setting
Note: This flag indicates when the soft-stepping for ADC channel is completed. When AGC is
enabled the read value of this bit indicates the following
0 => AGC is not saturated.
1 => AGC is saturated.
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