參數(shù)資料
型號： TSC21020F-20MC-E
英文描述： FPGA, CYCLONE III, 25K LE, 256UBGA Programmable Logic Type:FPGA; Logic IC function:FPGA; Logic IC family:Cyclone III; Logic IC Base Number:3; I/O lines, No. of:156;
中文描述： 控制器雜項-數(shù)據(jù)表參考
文件頁數(shù)： 29/51頁
文件大?。?/td> 763K
代理商： TSC21020F-20MC-E
29
TSC21020F
4153F
–
AERO
–
06/03
Electrical Characteristics
Absolute Maximum Ratings
Recommended Operating Conditions
ESD Sensitivity
The TSC21020F features proprietary input protection circuitry to dissipate high-energy
discharges (Human Body Model). Per method 3015 of MIL-STD-883, the TSC21020F
has been classified as a Class 2 devices, with the ability to withstand up to 2000V ESD.
Prosper ESD precautions are strongly recommended to avoid functional damage or per-
formance degradation. Charges readily accumulate on the human body and test
equipment and discharge without detection. Unused devices must be stored in conduc-
tive foam or shunts, and the foam should be discharged to the destination socket before
devices are removed.
DC Parameters
Supply Voltage.....................................................-0.5V to + 7V
Input Voltage............................................-0.5V to VDD + 0.5V
Output Voltage Swing..............................-0.5V to VDD + 0.5V
Load Capacitance..........................................................200 pF
Operating Temperature Range (Ambient)..... -55
°
C to + 125
°
C
Storage Temperature Range ........................ -65
°
C to + 150
°
C
*Note:
Stresses above those listed under "Absolute
Maximum Ratings" may cause permanent dam-
age to the device. These are stress ratings only
and functional operation of the device at these or
any other conditions above those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect
device reliability.
Parameter
Mil Range
Unit
Min
Max
V
DD
Supply Voltage
4.50
5.50
V
T
AMB
Ambient Operating Temperature
-55
+125
°
C
Parameter
Test Conditions
Min
Max
Unit
V
IH
Hi-Level Input Voltage
1
V
DD
= max
2.0
V
V
IHCR
Hi-Level Input Voltage
2, 12
V
DD
= max
3.0
V
V
IL
Lo-Level Input Voltage
1, 12
V
DD
= min
0.8
V
V
ILC
Lo-Level Input Voltage
2
V
DD
= min
0.6
V
V
OH
Hi-Level Output Voltage
3, 11
V
DD
= min, I
OH
= -1.0 mA
2.4
V
V
OL
Lo-Level Output Voltage
3, 11
V
DD
= min, I
OL
= 4.0 mA
0.4
V
I
IH
Hi-Level Input Current
4, 5
V
DD
= max, V
IN
= V
DD
max
10
μ
A
I
IL
Lo-Level Input Current
4
V
DD
= max, V
IN
= 0V
10
μ
A
I
ILT
Lo-Level Input Current
5
V
DD
= max, V
IN
= 0V
350
μ
A
I
OZL
Tristate Leakage Current
6
V
DD
= max, V
IN
= 0V
10
μ
A
I
DDIN
Supply Current (Internal)
7
t
CK
= 50 ns, V
DD
= max, V
IHCR
= 3.0V,
V
IH
= 2.4V, V
IL
= V
ILC
= 0.4V
430
mA
相關(guān)PDF資料
PDF描述
TSC21020F-20SA IC CYCLONE III FPGA 25K 256 UBGA
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