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5.6.4.8 Interrupts
TSC2117
Low-Power Audio Codec With Embedded miniDSP, Stereo Class-D
Speaker Amplifier, and Smart Four-Wire Touch-Screen Controller
SLAS550A – APRIL 2009 – REVISED JUNE 2009
www.ti.com
Page 0/register 44, bit D4 is a sticky flag which is set when the headset insertion or removal event is
detected. These sticky flags are set by the event occurrence, and are reset only when read. This requires
polling page 0/register 44. To avoid polling and the associated overhead, the TSC2117 also provides an
interrupt feature whereby the events can trigger the INT1 and/or INT2 interrupts. These interrupt events
can be routed to one of the digital output pins. See
Section 5.6.4.8 for details.
The TSC2117 not only detects a headset insertion event, but also is able to distinguish between the
different
headsets
inserted,
such
as
stereo
headphones
or
cellular
headphones.
After
the
headset-detection event, the user can read page 0/register 67, bits D6–D5 to determine the type of
headset inserted.
Table 5-34. Headset-Detection Block Registers
Register
Description
Page 0/register 67, bit D1
Headset-detection enable/disable
Page 0/register 67, bits D4–D2
Debounce programmability for headset detection
Page 0/register 67, bits D1–D0
Debounce programmability for button press
Page 0/register 44, bit D5
Sticky flag for button-press event
Page 0/register 44, bit D4
Sticky flag for headset-insertion or -removal event
Page 0/rRegister 46, bit D5
Status flag for button-press event
Page 0/register 46, bit D4
Status flag for headset insertion and removal
Page 0/register 67, bits D6–D5
Flags for type of headset detected
The headset detection block requires AVDD to be powered. The headset detection feature in the
TSC2117 is achieved with very low power overhead, requiring less than 20
A of additional current from
the AVDD supply.
Some specific events in the TSC2117 which may require host processor intervention, can be used to
trigger interrupts to the host processor. This avoids polling the status-flag registers continuously. The
TSC2117 has two defined interrupts, INT1 and INT2, that can be configured by programming
page 0/registers 48 and 49. A user can configure interrupts INT1 and INT2 to be triggered by one or many
events, such as:
Headset detection
Button press
DAC DRC signal exceeding threshold
Noise detected by AGC
Overcurrent condition in headphone drivers/speaker drivers
Data overflow in ADC and DAC processing blocks and filters
DC measurement data available
SAR measurement data available
Touch detection
Each of these INT1 and INT2 interrupts can be routed to output pins like GPIO1, GPIO2, SDOUT, and
MISO by configuring the respective output control registers in page 0/registers 51, 52, 53, and 55. These
interrupt signals can either be configured as a single pulse or a series of pulses by programming
page 0/register 48, bit D0 and page 0/register 49, bit D0. If the user configures the interrupts as a series of
pulses, the events trigger the start of pulses that stop when the flag registers in page 0/registers 44, 45,
and 50 are read by the user to determine the cause of the interrupt.
APPLICATION INFORMATION
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