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參數(shù)資料
| 型號： | TVP3703-135 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Video Interface PALETTE Exract(雙PLL，先進的視頻接口調(diào)色器) |
| 中文描述： | 視頻接口調(diào)色板Exract（雙鎖相環(huán)，先進的視頻接口調(diào)色器） |
| 文件頁數(shù)： | 4/21頁 |
| 文件大?。?/td> | 427K |
| 代理商： | TVP3703-135 |
TVP3703
VIDEO INTERFACE PALETTE
TRUE-COLOR CMOS RAMDAC
SLAS100 – MARCH 1996
4
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
DAC interface
TERMINAL
I/O
DESCRIPTION
NAME
RED,
GREEN,
BLUE
NO.
38–40
O
DAC video outputs. These signals are designed to drive a doubly terminated 75-
load.
REF
51
I
External 1.235-V reference voltage. An external bypass capacitor should be connected from REF to GND.
RSET
48
I
A precision resistor placed between RSET and GND sets the full-scale DAC current. The required resistor value
can be calculated from:
where Vref is the external or internal reference voltage and IO is the required DAC full-scale output current. Rset
is typically 147
for VGA (see application information section).
COMP
49
I
External compensation capacitor connection for DACs.
SENSE
68
O
Sense out. SENSE is a logical 0 if one or more of the DAC outputs exceeds the internal DAC comparator trip
voltage (which is midway between the DAC full scale and GND potentials).
frequency synthesizer interface
TERMINAL
I/O
DESCRIPTION
NAME
XOUT
NO.
6
O
Crystal output and input connections. A series-resonant crystal must be connected between XOUT and XIN
h PLL
to provide the reference clock for the PLLs.
XIN
7
I
VCLK
9
O
Video clock PLL out
MCLK
61
O
Memory clock PLL out
power supply
TERMINAL
I/O
DESCRIPTION
NAME
VDD
NO.
8, 27, 35,
62
Digital power
AVDD
GND
3, 42
Analog power for the DACs and PLL.
2, 10, 36,
37, 41, 60
Common ground rail for all circuitry.
NC
26, 28–34
No internal connection. For future upgrade to a 24-bit pixel port the controller. Outputs P16–P23 can be routed
to terminals 26, 28–34 respectively.
detailed description
micro port
The TVP3703 micro port (see Table 1) is an extension of the standard VGA micro port and powers up with a
register configuration compatible with standard and high-color VGA. There are two methods for accessing the
register set of the TVP3703 – direct register space (RS) access and indirect access.
direct RS access
This feature supports direct RS mapping to eight address locations that access the VGA color palette, pixel
command register, and an indexed register. The index low/high registers increment after every access to the
indexed register.
Rset( )
2.1
Vref
IO
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| TVP3703FN | VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC |
| TVP5020TQFP | NTSC/PAL VIDEO DECODER |
| TVP5031 | NTSC/PAL VIDEO DECODER |
| TVP5031TQFP | NTSC/PAL VIDEO DECODER |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP3703-135CFN | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| TVP3703FN | 制造商:TI 制造商全稱:Texas Instruments 功能描述:VIDEO INTERFACE PALETTE TRUE-COLOR CMOS RAMDAC |
| TVP4020AGFN | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TVP4020AGFN-8 | 制造商:Rochester Electronics LLC 功能描述:- Bulk 制造商:Texas Instruments 功能描述: |
| TVP5010 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:NTSC/PAL Video Decoder |
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