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參數(shù)資料
| 型號(hào)： | TVP5150AEVM |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 13/74頁 |
| 文件大?。?/td> | 0K |
| 描述： | TVP5150AEVM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 視頻，視頻解碼器 |
| 已用 IC / 零件： | TVP5150A |
| 主要屬性： | NTSC/PAL 數(shù)字視頻解碼器 |
| 次要屬性： | 圖形用戶接口，I²C 接口 |
| 已供物品： | 2 個(gè)板，線纜，CD，電源 |
| 配用： | 296-23058-ND - EVAL MODULE FOR DM642 |
| 相關(guān)產(chǎn)品： | TVP5150PBSR-ND - IC NTSC/PAL/SECAM DECODER 32TQFP TVP5150APBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP TVP5150AM1ZQCR-ND - IC VIDEO DECODER 8BIT 48BGA TVP5150AM1PBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP TVP5150AM1PBSG4-ND - IC VIDEO DECODER 8BIT 32TQFP 296-32781-ND - IC VIDEO DECODER 8BIT 32TQFP 296-32780-ND - IC VIDEO DECODER 8BIT 48BGA 296-27133-ND - IC VIDEO DECODER 8BIT 32TQFP 296-23026-6-ND - IC VIDEO DECODER 48-BGA 296-23025-6-ND - IC VIDEO DECODER 32-TQFP 更多... |
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Step 5
9
I2C Acknowledge (slave)
A
Step 6
7
6
5
4
3
2
1
0
I2C Write data (master)
Data
Step 7
9
I2C Acknowledge (slave)
A
Step 8
0
I2C Stop (master)
P
Repeat steps 6 and 7 until all data have been written.
2.15.2 I2C Read Operation
The read operation consists of two phases. The first phase is the address phase. In this phase, an I2C master initiates
a write operation to the TVP5150A decoder by generating a start condition (S) followed by the TVP5150A I2C address,
in MSB first bit order, followed by a 0 to indicate a write cycle. After receiving acknowledges from the TVP5150A
decoder, the master presents the subaddress of the register or the first of a block of registers it wants to read. After
the cycle is acknowledged, the master terminates the cycle immediately by generating a stop condition (P).
Table 27. Read Address Selection
I2CSEL
READ ADDRESS
0
B9h
1
BBh
The second phase is the data phase. In this phase, an I2C master initiates a read operation to the TVP5150A decoder
by generating a start condition followed by the TVP5150A I2C address (as shown below for a read operation), in MSB
first bit order, followed by a 1 to indicate a read cycle. After an acknowledge from the TVP5150A decoder, the I2C
master receives one or more bytes of data from the TVP5150A decoder. The I2C master acknowledges the transfer
at the end of each byte. After the last data byte desired has been transferred from the TVP5150A decoder to the
master, the master generates a not acknowledge followed by a stop.
2.15.2.1 Read Phase 1
Step 1
0
I2C Start (master)
S
Step 2
7
6
5
4
3
2
1
0
I2C General address (master)
1
0
1
0
X
0
Step 3
9
I2C Acknowledge (slave)
A
Step 4
7
6
5
4
3
2
1
0
I2C Read register address (master)
addr
Step 5
9
I2C Acknowledge (slave)
A
Step 6
0
I2C Stop (master)
P
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
| TVP5150AM1 | 制造商:Texas Instruments 功能描述:Ultra-low Power Video Decoder TVP5150AM1 |
| TVP5150AM1-EP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Ultralow-Power NTSC/PAL/SECAM Video Decoder |
| TVP5150AM1IPBS | 功能描述:視頻 IC Ultralow Pwr NTSC PAL/SECAM Vid Dec RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5150AM1IPBS | 制造商:Texas Instruments 功能描述:IC VIDEO DECODER 9BIT 30MSPS TQFP-32 制造商:Texas Instruments 功能描述:IC, VIDEO DECODER, 9BIT, 30MSPS, TQFP-32 |
| TVP5150AM1IPBSQ1 | 功能描述:視頻 IC UltraLo Pwr NTSC/ PAL/SECAM Vid Dec RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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