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參數(shù)資料
| 型號： | TVP5150AEVM |
| 廠商： | Texas Instruments |
| 文件頁數(shù)： | 25/74頁 |
| 文件大?。?/td> | 0K |
| 描述： | TVP5150AEVM |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 主要目的： | 視頻，視頻解碼器 |
| 已用 IC / 零件： | TVP5150A |
| 主要屬性： | NTSC/PAL 數(shù)字視頻解碼器 |
| 次要屬性： | 圖形用戶接口，I²C 接口 |
| 已供物品： | 2 個板，線纜，CD，電源 |
| 配用： | 296-23058-ND - EVAL MODULE FOR DM642 |
| 相關(guān)產(chǎn)品： | TVP5150PBSR-ND - IC NTSC/PAL/SECAM DECODER 32TQFP TVP5150APBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP TVP5150AM1ZQCR-ND - IC VIDEO DECODER 8BIT 48BGA TVP5150AM1PBSRG4-ND - IC VIDEO DECODER 8BIT 32TQFP TVP5150AM1PBSG4-ND - IC VIDEO DECODER 8BIT 32TQFP 296-32781-ND - IC VIDEO DECODER 8BIT 32TQFP 296-32780-ND - IC VIDEO DECODER 8BIT 48BGA 296-27133-ND - IC VIDEO DECODER 8BIT 32TQFP 296-23026-6-ND - IC VIDEO DECODER 48-BGA 296-23025-6-ND - IC VIDEO DECODER 32-TQFP 更多... |
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221
2.20.8 Luminance Processing Control #1 Register
Address
07h
Default
60h
7
6
5
4
3
2
1
0
2x luma output
enable
Pedestal not present
Disable raw
header
Luma bypass enabled
during vertical blanking
Luminance signal delay with respect to
chrominance signal
2x luma output enable:
0 = Output depends on bit 4, luminance bypass enabled during vertical blanking (default).
1 = Outputs 2x luma samples during the entire frame. This bit takes precedence over bit 4.
Pedestal not present:
0 = 7.5 IRE pedestal is present on the analog video input signal.
1 = Pedestal is not present on the analog video input signal (default).
Disable raw header:
0 = Insert 656 ancillary headers for raw data
1 = Disable 656 ancillary headers and instead force dummy ones (0x40) (default)
Luminance bypass enabled during vertical blanking:
0 = Disabled. If bit 7, 2x luma output enable, is 0, then normal luminance processing occurs and YCbCr
samples are output during the entire frame (default).
1 = Enabled. If bit 7, 2x luma output enable, is 0, then normal luminance processing occurs and YCbCr
samples are output during VACTIVE and 2x luma samples are output during VBLK. Luminance bypass
occurs for the duration of the vertical blanking as defined by registers 18h and 19h.
Luminance bypass occurs for the duration of the vertical blanking as defined by registers 18h and 19h.
Luma signal delay with respect to chroma signal in pixel clock increments (range 8 to +7 pixel clocks):
1111 = 8 pixel clocks delay
1011 = 4 pixel clocks delay
1000 = 1 pixel clocks delay
0000 = 0 pixel clocks delay (default)
0011 = 3 pixel clocks delay
0111 = 7 pixel clocks delay
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TVP5150AM1 | 制造商:Texas Instruments 功能描述:Ultra-low Power Video Decoder TVP5150AM1 |
| TVP5150AM1-EP | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Ultralow-Power NTSC/PAL/SECAM Video Decoder |
| TVP5150AM1IPBS | 功能描述:視頻 IC Ultralow Pwr NTSC PAL/SECAM Vid Dec RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
| TVP5150AM1IPBS | 制造商:Texas Instruments 功能描述:IC VIDEO DECODER 9BIT 30MSPS TQFP-32 制造商:Texas Instruments 功能描述:IC, VIDEO DECODER, 9BIT, 30MSPS, TQFP-32 |
| TVP5150AM1IPBSQ1 | 功能描述:視頻 IC UltraLo Pwr NTSC/ PAL/SECAM Vid Dec RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel |
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