For most applications, PI/O P
參數(shù)資料
型號(hào)： TWR-MCF51MM
廠商： Freescale Semiconductor
文件頁(yè)數(shù)： 10/57頁(yè)
文件大小： 0K
描述： TOWER SYSTEM BOARD MCF51MM
設(shè)計(jì)資源： TWR-MCF51MM Schematic
標(biāo)準(zhǔn)包裝： 1
系列： ColdFire®, Flexis™
類(lèi)型： MCU
適用于相關(guān)產(chǎn)品： Freescale 電源塔系統(tǒng)，MCF51MM
所含物品： 板
Electrical Characteristics
Freescale Semiconductor
18
For most applications, PI/O Pint and can be neglected. An approximate relationship between PD and TJ
(if PI/O is neglected) is:
PD = K (TJ + 273C)
Eqn. 2
Solving Equation 1 and Equation 2 for K gives:
K = PD (TA + 273C) + JA (PD)2
Eqn. 3
where K is a constant pertaining to the particular part. K can be determined from Equation 3 by measuring
PD (at equilibrium) for a known TA. Using this value of K, the values of PD and TJ can be obtained by
solving Equation 1 and Equation 2 iteratively for any value of TA.
3.4
ESD Protection Characteristics
Although damage from static discharge is much less common on these devices than on early CMOS
circuits, normal handling precautions should be used to avoid exposure to static discharge. Qualification
tests are performed to ensure that these devices can withstand exposure to reasonable levels of static
without suffering any permanent damage.
All ESD testing is in conformity with CDF-AEC-Q00 Stress Test Qualification for Automotive Grade
Integrated Circuits. (http://www.aecouncil.com/) This device was qualified to AEC-Q100 Rev E.
A device is considered to have failed if, after exposure to ESD pulses, the device no longer meets the
device specification requirements. Complete dc parametric and functional testing is performed per the
applicable device specification at room temperature followed by hot temperature, unless specified
otherwise in the device specification.
Table 7. ESD and Latch-up Test Conditions
Model
Description
Symbol
Value
Unit
Human Body
Series Resistance
R1
1500
Storage Capacitance
C
100
pF
Number of Pulse per pin
—
3
—
Machine
Series Resistance
R1
0
Storage Capacitance
C
200
pF
Number of Pulse per pin
—
3
—
Latch-up
Minimum input voltage limit
—
–2.5
V
Maximum input voltage limit
—
7.5
V
Table 8. ESD and Latch-Up Protection Characteristics
#
Rating
Symbol
Min
Max
Unit
C
1
Human Body Model (HBM)
VHBM
2000
—
V
T
2
Machine Model (MM)
VMM
200
—
V
T
MCF51MM256/128, Rev. 5
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