Table 18. MCG (Temperat" />
參數(shù)資料
型號： TWR-MCF51MM
廠商： Freescale Semiconductor
文件頁數(shù)： 31/57頁
文件大小： 0K
描述： TOWER SYSTEM BOARD MCF51MM
設(shè)計資源： TWR-MCF51MM Schematic
標(biāo)準(zhǔn)包裝： 1
系列： ColdFire®, Flexis™
類型： MCU
適用于相關(guān)產(chǎn)品： Freescale 電源塔系統(tǒng)，MCF51MM
所含物品： 板
Electrical Characteristics
Freescale Semiconductor
37
3.10 MCG and External Oscillator (XOSC) Characteristics
Table 18. MCG (Temperature Range = –40 to 105°C Ambient)
#
Rating
Symbol
Min
Typical
Max
Unit
C
1 Internal reference startup time
tirefst
—55
100
sD
2
Average internal reference
frequency
factory trimmed at
VDD=3.0 V and
temp=25C
fint_ft
—
31.25
—
kHz
C
user trimmed
31.25
—
39.0625
C
3
DCO output frequency range —
trimmed
Low range
(DRS=00)
fdco_t
16
—
20
MHz
C
Mid range
(DRS=01)
32
—
40
C
High range1
(DRS=10)
1 This should not exceed the maximum CPU frequency for this device which is 50.33 MHz.
40
—
60
C
4
Resolution of trimmed DCO
output frequency at fixed voltage
and temperature
with FTRIM
fdco_res_t
—
0.1
0.2
%fdco
C
without FTRIM
—
0.2
0.4
C
5
Total deviation of trimmed DCO
output frequency over voltage and
temperature
over voltage and
temperature
fdco_t
—
1.0
2
%fdco
P
over fixed voltage
and temp range
of 0 – 70 C
—
0.5
1C
6
Acquisition time
FLL2
tfll_acquire
——
1
ms
C
PLL3
tpll_acquire
——
1
D
7
Long term Jitter of DCO output clock (averaged over
2mS interval) 4
CJitter
—0.02
0.2
%fdco C
8 VCO operating frequency
fvco
7.0
—
55.0
MHz
D
9 PLL reference frequency range
fpll_ref
1.0
—
2.0
MHz
D
10
Jitter of PLL output clock
measured over 625ns 5
Long term
fpll_jitter_625
ns
—
0.5664
—
%fpll
D
11 Lock frequency tolerance
Entry6
Dlock
1.49
—
2.98
%
D
Exit7
Dunl
4.47
—
5.97
D
12 Lock time
FLL
tfll_lock
——
tfll_acquire+
1075(1/fint_t)
s
D
PLL
tpll_lock
——
tpll_acquire+
1075(1/fpll_re
f)
D
13
Loss of external clock minimum frequency - RANGE =
0
floc_low
(3/5) x
fint_t
——
kHz
D
14
Loss of external clock minimum frequency - RANGE =
1
floc_high
(16/5) x
fint_t
——
kHz
D
MCF51MM256/128, Rev. 5
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