參數(shù)資料
型號： TZA1047HL/M2
廠商： NXP SEMICONDUCTORS
元件分類： 消費(fèi)家電
英文描述： SPECIALTY CONSUMER CIRCUIT, PQFP64
封裝： 10 X 10 MM, 1.4 MM HEIGHT, PLASTIC, MS-026, SOT314-2, LQFP-64
文件頁數(shù)： 37/69頁
文件大?。?/td> 324K
代理商： TZA1047HL/M2
9397 750 14664
Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 1 June 2005
42 of 69
Philips Semiconductors
TZA1047
Preprocessor IC for CD and DVD rewritable
The selection tables for MON1 and MON2 are identical so each signal can be sent to
either output. Selecting the same signal for both monitor outputs (bits
MSEL[7:4] = MSEL[3:0]) switches off the MON block, which reduces the power dissipation
during normal operation.
7.15 I2C-bus interface and registers
7.15.1 General description
Most functions in the TZA1047 are controlled via an I2C-bus interface conforming to the
fast-mode specication, allowing data transfers of up to 400 kHz. The write address of the
TZA1047 is 34h; this is also the write address of the TZA1039.
There are 52 read/write data registers. The register that is written to is determined by
sub-address bits 4 to 0 which is in the rst 8-bit word that is transmitted after the device
address. Bit 7 of the sub-address controls the auto-incrementing of the sub-address:
bit7=0 enables auto-incrementing and wrap-around, bit7=1 disables
auto-incrementing so that the same register is written to each time. Examples of valid
write transmissions are shown in Figure 24.
TZA1047 also supports read back of register data via the I2C-bus. It does not generate
any data itself. The only possibility is to read back previously written data, e.g. to check
the connections to the device or to check the registers after start-up. Read-back mode is
selected by setting the LSB of the device address to logic 1. After sending the device
address, the TZA1047 will start returning register data starting at the last written
address. Auto-increment and wrap-around are supported in the same way as for write.
Before starting read back it is good practice to rst initialize the starting address by issuing
a write command.
1101
Q6/10
1101
Q6/10
1110res.
1111res.
Table 23:
Monitor selection …continued
MSEL7
MSEL6
MSEL5
MSEL4
MON2
MSEL3
MSEL2
MSEL1
MSEL0
MON1
Fig 24. Examples of valid write transmissions.
001aab425
START
BIT
write one
register:
write with
auto-increment:
write with
wrap-around:
write without
auto-increment:
STOP
BIT
ADDRESS
34h
DATA
00h
DATA
00h
SUB-ADDRESS
00h
START
BIT
DATA
01h
DATA
STOP
BIT
ADDRESS
34h
SUB-ADDRESS
00h
DATA
31h
START
BIT
DATA
00h
DATA
01h
DATA
STOP
BIT
ADDRESS
34h
SUB-ADDRESS
31h
DATA
05h
START
BIT
DATA
05h
DATA
05h
DATA
STOP
BIT
ADDRESS
34h
SUB-ADDRESS
85h
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