參數(shù)資料
型號(hào): TZA3004
廠商: NXP Semiconductors N.V.
英文描述: SDH/SONET STM1/OC3 and STM4/OC12 transceiver
中文描述: SDH / SONET的STM1/OC3和STM4/OC12收發(fā)器
文件頁數(shù): 2/28頁
文件大?。?/td> 127K
代理商: TZA3004
2000 Feb 17
2
Philips Semiconductors
Product specification
SDH/SONET STM1/OC3 and STM4/OC12
transceiver
TZA3005H
FEATURES
Supports STM1/OC3 (155.52 Mbits/s) and STM4/OC12
(622.08 Mbits/s)
Supports reference clock frequencies of 19.44, 38.88,
51.84 and 77.76 MHz
Meets Bellcore, ANSI and ITU-T specifications
Meets ITU jitter specification typically to a factor of 2.5
Integral high-frequency PLL for clock generation
Interface to TTL logic
Low jitter PECL (Positive Emitter Coupled Logic)
interface
4 or 8-bit STM1/OC3 TTL data path
4 or 8-bit STM4/OC12 TTL data path
No external filter components required
QFP64 package
Diagnostic and line loopback modes
Lock detect
LOS (Loss of Signal) input
Low power (0.9 W typical)
Selectable frame detection and byte realignment
Loop timing
Forward and reverse clocking
Squelched clock operation
Self-biased PECL inputs to support AC coupling.
APPLICATIONS
SDH/SONET modules
SDH/SONET-based transmission systems
SDH/SONET test equipment
ATM (Asynchronous Transfer Mode) over SDH/SONET
Add drop multiplexers
Broadband cross-connects
Section repeaters
Fibre optic test equipment
Fibre optic terminators.
GENERAL DESCRIPTION
The TZA3005H SDH/SONET transceiver chip is a fully
integrated serialization/deserialization STM1/OC3
(155.52 Mbits/s) and STM4/OC12 (622.08 Mbits/s)
interfacedevice.Itperformsallnecessaryserial-to-parallel
and parallel-to-serial functions in accordance with
SDH/SONET transmission standards. It is suitable for
SONET-based applications and can be used in
conjunction with the data and clock recovery unit
(TZA3004), optical front-end (TZA3023 with TZA3034/44)
andalaserdriver(TZA3001).Atypicalnetworkapplication
is shown in Fig.10.
A high-frequency phase-locked loop is used for on-chip
clock synthesis, which allows a slower external transmit
reference clock to be used. A reference clock of 19.44,
38.88,51.84 or 77.76 MHzcanbeusedtosupportexisting
system clocking schemes. The TZA3005H also performs
SDH/SONET frame detection.
The low jitter PECL interface ensures that Bellcore, ANSI,
and ITU-T bit-error rate requirements are satisfied.
The TZA3005H is supplied in a compact QFP64 package.
ORDERING INFORMATION
TYPE
NUMBER
PACKAGE
NAME
DESCRIPTION
VERSION
TZA3005H
QFP64
plastic quad flat package; 64 leads (lead length 1.6 mm);
body 14
×
14
×
2.7 mm
SOT393-1
相關(guān)PDF資料
PDF描述
TZA3004HL SDH/SONET data and clock recovery unit STM1/4 OC3/12
X00602 SENSITIVE GATE SCR
X00602MA 0.8A SCRs
X00602MA1AA2 0.8A SCRs
X00602MA2AL2 0.8A SCRs
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TZA3004HL 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SDH/SONET data and clock recovery unit STM1/4 OC3/12
TZA3005 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SDH/SONET STM1/OC3 and STM4/OC12 transceiver
TZA3005H 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:SDH/SONET STM1/OC3 and STM4/OC12 transceiver
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