
SLUS517B DECEMBER 2002 REVISED AUGUST 2004
1
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FEATURES
Provides Control of PFC and PWM Power
Stages In One Device
Leading-Edge PFC, Trailing-Edge PWM
Modulation for Reduced Ripple
Built-In Sequencing of PFC and PWM
Turn-On
2-A Source and 3-A Sink Gate Drive for Both
PFC and PWM Stages
Typical 16-ns Rise Time and 7-ns Fall Time
into 1-nF Loads
PFC Features
Average-Current-Mode Control for
Continuous Conduction Mode Operation
Highly-Linear Multiplier for Near-Unity
Power Factor
Input Voltage Feedforward Implementation
Improved Load Transient Response
Accurate Power Limiting
Zero Power Detect
PWM Features
Peak-Current-Mode Control Operation
1:1 or 1:2 PFC:PWM Frequency Options
Programmable maximum duty cycle
Programmable Soft-Start
Two Hysteresis Options for Differing
Hold-Up Time Requirements
DESCRIPTION
The UCC28510 series of combination PFC/PWM
controllers provide complete control functionality
for
any
off-line
power
compliance with the IEC100032 harmonic
reduction requirements. By combining the control
and drive signals for the PFC and the PWM stages
into a single device, significant performance and
cost benefits are gained. By managing the
modulation mechanisms of the two stages
(leading-edge
modulation
trailing-edge modulation for PWM), the ripple
current in the boost capacitor is minimized.
Based on the average current mode control
architecture with input voltage feedforward of prior
PFC/PWM combination controllers, these devices
offer performance advantages. Two new key
PWM features are programmable maximum duty
cycle and the 2x PWM frequency options to the
base PFC frequency. For the PFC stage, the
devices feature an improved multiplier and the
use of a transconductance amplifier for enhanced
transient response.
The core of the PFC section is in a three-input
multiplier that generates the reference signal for
the line current. The UCC28510 series features a
highly linearized multiplier circuit capable of
producing a low distortion reference for the line
current over the full range of line and load
conditions. A low-offset, high-bandwidth current
error amplifier ensures that the actual inductor
current (sensed through a resistor in the return
path) follows the multiplier output command
signal. The output voltage error is processed
through a transconductance voltage amplifier.
system
requiring
for
PFC
and
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Copyright
2004, Texas Instruments Incorporated