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參數(shù)資料
| 型號： | UCC38517 |
| 廠商： | Texas Instruments, Inc. |
| 元件分類： | 基準(zhǔn)電壓源/電流源 |
| 英文描述： | ADVANCED PFC/PWM COMBINA CONTROLLERS |
| 中文描述： | 高級式PFC /脈寬調(diào)制COMBINA控制器 |
| 文件頁數(shù)： | 19/39頁 |
| 文件大?。?/td> | 725K |
| 代理商： | UCC38517 |
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SLUS517B DECEMBER 2002 REVISED AUGUST 2004
19
www.ti.com
APPLICATION INFORMATION
The current sense resistor for the PWM stage, R5, is selected so that at maximum current, its voltage is the
threshold voltage of the peak current comparator (nominally 1.3 V).
R5
V
TH
PWM stage
I
LIMIT
i
Q2(peak)
In many cases, an input line filter will be necessary in order to meet the requirements of an agency or application.
The input line filter design has been omitted from this procedure due to the vast array of requirements and
circumstances. We urge you to refer to Reference [11] for details.
PFC stage control
The PFC stage is designed in a three-step process. First, set the dynamic range of the multiplier, second,
stabilize the average current control loop and third, stabilize the voltage loop that controls the energy storage
capacitor voltage. Use as much of the dynamic range of the multiplier as possible. The current control loop must
have wide bandwidth in order to follow the instantaneous rectified line voltage. The voltage loop must be slower
than twice the ac line frequency so that it will not compromise the power factor.
multiplier
The dynamic range of the multiplier is a function of the currents and/or voltages of the IAC, VAOUT and VFF
pins. Coordinate the selection process to use the full range of the multiplier and obtain the desired power limiting
features. Select the components R1 and R15 to use the i
IAC
(t) range and the V
VFF
range under the condition
that the maximum of the V
VAOUT
range, described in equation 11. The selection process is similar to the
selection process for UC3854, except for the VFF voltage and MOUT current limitations.
[12]
In this product
series, the divide-by-square function is internally implemented so that it divides by the greater of 1.4 V or V
VFF
.
If the 1.4-V level controls the divider, power factor correction may still occur if the VAOUT level is within the
functioning range of the multiplier. Power factor correction occurs during that condition because the multiplier
section functions as a two-input multiplier, rather than a three-input multiplier. Notice that the voltage at the VFF
pin will be proportional to the average of the IAC current. Typically, V
VFF
=1.4 V at low ac line voltage is set as
the design boundary; the upper boundary of V
VFF
will remain within the range if the functional ac line voltage
range varies by less than 4.3:1.
0
i
IAC
(t)
500 A,
0
V
VAOUT
(t)
5 V,
1.4 V
V
VFF
V
VREF
1.4 V
(10)
(11)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UCC38531 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Universal Serial Bus Power Controller |
| UCC3857 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Isolated Boost PFC Preregulator Controller |
| UCC3857N | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:IC-PFC PRE-REGULATOR |
| UCC3858 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:High Efficiency, High Power Factor Preregulator |
| UCC3858J | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Analog IC |
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