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參數(shù)資料
| 型號： | UCD9240RHBR |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | UCD9240 Digital Point of Load System Controller |
| 中文描述： | UCD9240系列數(shù)字點(diǎn)系統(tǒng)控制器的負(fù)荷 |
| 文件頁數(shù)： | 16/21頁 |
| 文件大?。?/td> | 572K |
| 代理商： | UCD9240RHBR |
UCD9240
Digital Point of Load System Controller
SLUS766
– APRIL 2007
16
www.ti.com
The switching frequency is set by issuing the FREQUENCY_SWITCH PMBus command.
Fault Handling
The UCD9240 has several fault handling features. The following faults are handled.
1. Vin is monitored for over-voltage or under-voltage.
2. A logic high signal from an external source, such as the gate driver IC will cause a fault and immediately
shut down the PWM engine. The response to the event is programmed through a PMBus command.
3. The device contains programmable internal analog comparators that monitor the current sense inputs. If
the current sense input exceeds the programmed threshold the PWM signal is shut down.
4. Monitoring and averaging the current sense inputs for each multiphase power stage that makes up an
output rail. Over current and under current (negative) thresholds are programmed via PMBus for each rail.
The response to the event is also programmed through a PMBus command.
5. Temperature is periodically measured and compared to the PMBus configured over-temperature
threshold.
Temperature Measurement
The UCD9240 has the ability to measure current and temperature in the controlled power stage. The pin
Temp
and the select pins
TMUX0-2
are used to control an external analog multiplexer which cycles through each of the
power stage temperature measurement signals. It can be programmed to accept the output from either a linear
device such as an LM20 temperature sensor or a diode forward voltage.
high res
ramp
counter
Clk
reset
Switch period
Current balance adj
Compensator output
EADC trigger threshold
SyncOut phase
PWM gate drive output
SysClk
SyncIn
EADC trigger
SyncOut
S
R
PWM Engine (1 of 4)
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