參數(shù)資料
型號: UPA2791GR
廠商: NEC Corp.
英文描述: MOS FIELD EFFECT TRANSISTOR SWITCHING N- AND P-CHANNEL POWER MOS FET
中文描述: MOS場效應晶體管的開關(guān)N溝道和P溝道功率場效應晶體管
文件頁數(shù): 4/12頁
文件大?。?/td> 245K
代理商: UPA2791GR
Data Sheet G18207EJ2V0DS
4
μ
PA2791GR
P-channel
CHARACTERISTICS
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX. UNIT
Zero Gate Voltage Drain Current
I
DSS
V
DS
=
30 V, V
GS
= 0 V
10
μ
A
Gate Leakage Current
I
GSS
V
GS
=
m
16 V, V
DS
= 0 V
m
10
μ
A
Gate to Source Cut-off Voltage
V
GS(off)
V
DS
=
10 V, I
D
=
1 mA
1.0
2.5
V
Forward Transfer Admittance
Note
| y
fs
|
V
DS
=
10 V, I
D
=
3 A
1.0
S
Drain to Source On-state Resistance
Note
R
DS(on)1
V
GS
=
10 V, I
D
=
3.0 A
63
82
m
Ω
R
DS(on)2
V
GS
=
4.5 V, I
D
=
3.0 A
79
110
m
Ω
Input Capacitance
C
iss
V
DS
=
10 V,
300
pF
Output Capacitance
C
oss
V
GS
= 0 V,
75
pF
Reverse Transfer Capacitance
C
rss
f = 1 MHz
60
pF
Turn-on Delay Time
t
d(on)
V
DD
=
15 V, I
D
=
3 A,
8
ns
Rise Time
t
r
V
GS
=
10 V,
14
ns
Turn-off Delay Time
t
d(off)
R
G
= 10
Ω
50
ns
Fall Time
t
f
40
ns
Total Gate Charge
Q
G
I
D
=
5 A,
8.3
nC
Gate to Source Charge
Q
GS
V
DD
=
24 V,
1.2
nC
Gate to Drain Charge
Q
GD
V
GS
=
10 V
2.4
nC
Body Diode Forward Voltage
Note
V
F(S-D)
I
F
= 5 A, V
GS
= 0 V
0.96
V
Reverse Recovery Time
t
rr
I
F
= 5 A, V
GS
= 0 V,
37
ns
Reverse Recovery Charge
Q
rr
di/dt = 50 A/
μ
s
29
nC
Note
Pulsed
TEST CIRCUIT 1 AVALANCHE CAPABILITY
R
G
= 25
Ω
50
Ω
L
V
DD
V
GS
=
20
0 V
BV
DSS
I
AS
I
D
V
DS
Starting T
ch
V
DD
D.U.T.
TEST CIRCUIT 3 GATE CHARGE
TEST CIRCUIT 2 SWITCHING TIME
PG.
R
G
0
V
GS
(
)
D.U.T.
R
L
V
DD
τ
= 1 s
Duty Cycle
1%
V
GS
Wave Form
V
DS
Wave Form
V
GS
(
)
10%
90%
V
GS
10%
0
V
DS
(
)
90%
90%
t
d(on)
t
r
t
d(off)
t
f
10%
τ
V
DS
0
t
on
t
off
PG.
PG.
50
Ω
D.U.T.
R
L
V
DD
I
G
=
2 mA
<R>
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