參數(shù)資料
型號: UPD4481361GF-A65
廠商: NEC Corp.
英文描述: 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
中文描述: 800萬位ZEROSB SRAM的流動經(jīng)手術(shù)
文件頁數(shù): 20/28頁
文件大?。?/td> 326K
代理商: UPD4481361GF-A65
20
Data Sheet M15561EJ3V0DS
μ
PD4481161, 4481181, 4481321, 4481361
POWER DOWN (ZZ) CYCLE
1
2
3
4
5
6
7
8
9
10
CLK
/CKE
ADV
/WE
/G
Data Out
/BWs
Address
A1
11
12
ZZ
TKHKH
TKHKL
TKLKH
TZZE
TZZR
Power Down (I
SBZZ
) State
A2
/CEs
Note
Note
High-Z
High-Z
Q (A1)
Q1 (A2)
Q2 (A2)
Note
/WE or /CEs must be held HIGH at CLK rising edge (clock edge No.3 in this figure) prior to power down state
entry.
相關(guān)PDF資料
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UPD4481361GF-C75 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
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UPD4481161GF-C85 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
UPD4481361 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION
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