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參數(shù)資料
| 型號(hào)： | UPD4481361GF-A65 |
| 廠商： | NEC Corp. |
| 英文描述： | 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION |
| 中文描述： | 800萬(wàn)位ZEROSB SRAM的流動(dòng)經(jīng)手術(shù) |
| 文件頁(yè)數(shù)： | 7/28頁(yè) |
| 文件大小： | 326K |
| 代理商： | UPD4481361GF-A65 |
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7
Data Sheet M15561EJ3V0DS
μ
PD4481161, 4481181, 4481321, 4481361
μ
PD4481321GF,
μ
PD4481361GF]
Symbol
Pin No.
Description
A0 to A17
37, 36, 35, 34, 33, 32, 100, 99, 82, 81, 44,
Synchronous Address Input
45, 46, 47, 48, 49, 50, 83
I/O1 to I/O32
52, 53, 56, 57, 58, 59, 62, 63, 68, 69, 72,
Synchronous Data In,
73, 74, 75, 78, 79, 2, 3, 6, 7, 8, 9, 12, 13,
Synchronous / Asynchronous Data Out
18, 19, 22, 23, 24, 25, 28, 29
I/OP1, NC
Note
51
Synchronous Data In (Parity),
I/OP2, NC
Note
80
Synchronous / Asynchronous Data Out (Parity)
I/OP3, NC
Note
1
I/OP4, NC
Note
30
ADV
85
Synchronous Address Load / Advance Input
/CE, CE2, /CE2
98, 97, 92
Synchronous Chip Enable Input
/WE
88
Synchronous Write Enable Input
/BW1 to /BW4
93, 94, 95, 96
Synchronous Byte Write Enable Input
/G
86
Asynchronous Output Enable Input
CLK
89
Clock Input
/CKE
87
Synchronous Clock Enable Input
MODE
31
Asynchronous Burst Sequence Select Input
Have to tied to V
DD
or V
SS
during normal operation
ZZ
64
Asynchronous Power Down State Input
V
DD
15, 16, 41, 65, 91
Power Supply
V
SS
14, 17, 40, 66, 67, 90
Ground
V
DD
Q
4, 11, 20, 27, 54, 61, 70, 77
Output Buffer Power Supply
V
SS
Q
5, 10, 21, 26, 55, 60, 71, 76
Output Buffer Ground
NC
38, 39, 42, 43, 84
No Connection
Note
NC (No Connection) is used in the
μ
PD4481321GF.
I/OP1 to I/OP4 are used in the
μ
PD4481361GF.
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| UPD4481361GF-C75 | 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION |
| UPD4481181GF-C85 | 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION |
| UPD4481161 | 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION |
| UPD4481161GF-C85 | 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION |
| UPD4481361 | 8M-BIT ZEROSB SRAM FLOW THROUGH OPERATION |
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