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參數(shù)資料
| 型號(hào)： | UPD46128512F9-CR2 |
| 廠商： | NEC Corp. |
| 英文描述： | 128M-BIT CMOS MOBILE SPECIFIED RAM 8M-WORD BY 16-BIT EXTENDED TEMPERATURE OPERATION |
| 中文描述： | 128兆位CMOS移動(dòng)指明內(nèi)存800萬(wàn)字由16位溫度范圍 |
| 文件頁(yè)數(shù)： | 19/82頁(yè) |
| 文件大小： | 817K |
| 代理商： | UPD46128512F9-CR2 |
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Preliminary Data Sheet M17507EJ2V0DS
19
μ
PD46128512-X
4.7 Burst Write Suspend/Resume
A burst write operation can be suspended by bringing /WE signal from LOW to HIGH during the burst write operation.
The /WE signal must be required to meet the specified setup / hold time to the clock which the data being suspended.
The burst write suspend will be effective after inputting first write data.
The burst suspend mode will be resumed by re-asserting /WE to LOW, and the first write data is written to the same
address location as of being suspended. Burst write suspend or resume is available only when WC = 1(/WE level
control) is set to the mode register (refer to
Table 5-2. Mode Register Definition (5th Bus Cycle)
.
Figure 4-4. Burst Write Suspend/Resume
T4
T5
T6
T9
T8
T10
T7
CLK (Input)
/ADV (Input)
/WE (Input)
A0 to A22 (Input)
/CE1 (Input)
DQ0 to DQ15 (Output)
H
t
WEH
t
WES
t
SWHP
t
WEH
t
WES
L
High-Z
D0
D1
D2
D3
t
WDH
t
WDS
t
WDH
t
WDS
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