參數(shù)資料
型號: UPD703100-40
廠商: NEC Corp.
英文描述: V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述: V850E/MS1TM 32/16單晶片微控制器
文件頁數(shù): 6/132頁
文件大小: 1174K
代理商: UPD703100-40
Preliminary Data Sheet U14168EJ2V0DS00
6
μ
PD703100A-33, 703100A-40, 703101A-33, 703102A-33
PIN IDENTIFICATION
A0 to A23:
ADTRG:
ANI0 to ANI7:
AV
DD
:
AV
REF
:
AV
SS
:
BCYST:
CKSEL:
CLKOUT:
CS0 to CS7:
CV
DD
:
CV
SS
:
D0 to D15:
DMAAK0 to DMAAK3
: DMA Acknowledge
DMARQ0 to DMARQ3
: DMA Request
HLDAK:
HLDRQ:
HV
DD
:
INTP100 to INTP103, Interrupt Request from Peripherals
INTP110 to INTP113,
INTP120 to INTP123,
INTP130 to INTP133,
INTP140 to INTP143,
INTP150 to INTP153
:
IORD:
I/O Read Strobe
IOWR:
I/O Write Strobe
LCAS:
Lower Column Address Strobe
LWR:
Lower Write Strobe
MODE0 to MODE3: Mode
NMI:
Non-Maskable Interrupt Request
OE:
Output Enable
P00 to P07:
Port 0
P10 to P17:
Port 1
P20 to P27:
Port 2
P30 to P37:
Port 3
P40 to P47:
Port 4
Address Bus
AD Trigger Input
Analog Input
Analog Power Supply
Analog Reference Voltage
Analog Ground
Bus Cycle Start Timing
Clock Generator Operating Mode Select
Clock Output
Chip Select
Clock Generator Power Supply
Clock Generator Ground
Data Bus
P50 to P57:
P60 to P67:
P70 to P77:
P80 to P87:
P90 to P97:
P100 to P107:
P110 to P117:
P120 to P127:
PA0 to PA7:
PB0 to PB7:
PX5 to PX7:
RAS0 to RAS7:
RD:
REFRQ:
RESET:
RXD0, RXD1:
SCK0 to SCK3:
SI0 to SI3:
SO0 to SO3:
TC0 to TC3:
TCLR10 to TCLR15
: Timer Clear
TI10 to TI15:
TO100, TO101,
TO110, TO111,
TO120, TO121,
TO130, TO131,
TO140, TO141,
TO150, TO151:
TXD0, TXD1:
UCAS:
UWR:
V
DD
:
V
SS
:
WAIT:
WE:
X1, X2:
Port 5
Port 6
Port 7
Port 8
Port 9
Port 10
Port 11
Port 12
Port A
Port B
Port X
Row Address Strobe
Read
Refresh Request
Reset
Receive Data
Serial Clock
Serial Input
Serial Output
Terminal Count Signal
Hold Acknowledge
Hold Request
Power Supply for External Pins
Timer Input
Timer Output
Transmit Data
Upper Column Address Strobe
Upper Write Strobe
Power Supply for Internal Unit
Ground
Wait
Write Enable
Crystal
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