參數(shù)資料
型號： UPD703100-40
廠商： NEC Corp.
英文描述： V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： V850E/MS1TM 32/16單晶片微控制器
文件頁數(shù)： 61/132頁
文件大小： 1174K
代理商： UPD703100-40
Preliminary Data Sheet U14168EJ2V0DS00
61
μ
PD703100A-33, 703100A-40, 703101A-33, 703102A-33
(2/7)
Execution
Clock
Flags
Mnemonic
Operand
Opcode
Operation
i
r
l
CY
OV
S
Z
SAT
00 0 0 0 1 1 0 0 1 i i i i iL
imm5,list12
LL L L L L L L L L L 0 0 0 00
sp
←
sp+zero-extend(imm5 logically shift left
by 2)
GR[reg in list12]
←
Load-memory(sp,Word)
sp
←
sp+4
repeat 2 steps above until all regs in list12
is loaded
N+1
Note 4
N+1
Note 4
N+1
Note 4
00 0 0 0 1 1 0 0 1 i i i i iL
LL L L L L L L L L L R R R RR
Note 5
DISPOSE
imm5,list12,[reg1]
sp
←
sp+zero-extend(imm5 logically shift left
by 2)
GR[reg in list12]
←
Load-memory(sp,Word)
sp
←
sp+4
repeat 2 steps above until all regs in list 12
is loaded
PC
←
GR[reg1]
N+3
Note 4
N+3
Note 4
N+3
Note 4
rr r r r 1 1 1 1 1 1 R R R RR
DIV
reg1,reg2,reg3
w w w w w
0 1 0 1 1 0 0 0 0 00
GR[reg2]
←
GR[reg2]
÷
GR[reg1]
GR[reg3]
←
GR[reg2]%GR[reg1]
35
35
35
reg1,reg2
r r r r r 0 0 0 0 1 0 R R R RR
GR[reg2]
←
GR[reg2]
÷
GR[reg1]
Note 6
35
35
35
×
×
×
r r r r r 1 1 1 1 1 1 R R R RR
DIVH
reg1,reg2,reg3
w w w w w
0 1 0 1 0 0 0 0 0 00
GR[reg2]
←
GR[reg2]
÷
GR[reg1]
GR[reg3]
←
GR[reg2]%GR[reg1]
Note 6
35
35
35
×
×
×
r r r r r 1 1 1 1 1 1 R R R RR
DIVHU
reg1,reg2,reg3
w w w w w
0 1 0 1 0 0 0 0 0 10
GR[reg2]
←
GR[reg2]
÷
GR[reg1]
GR[reg3]
←
GR[reg2]%GR[reg1]
Note 6
34
34
34
×
×
×
r r r r r 1 1 1 1 1 1 R R R RR
DIVU
reg1,reg2,reg3
w w w w w
0 1 0 1 1 0 0 0 0 10
GR[reg2]
←
GR[reg2]
÷
GR[reg1]
GR[reg3]
←
GR[reg2]%GR[reg1]
34
34
34
×
×
×
10 0 0 0 1 1 1 1 1 1 0 0 0 00
EI
00 0 0 0 0 0 1 0 1 1 0 0 0 00
PSW.ID
←
0
1
1
1
00 0 0 0 1 1 1 1 1 1 0 0 0 00
HALT
00 0 0 0 0 0 1 0 0 1 0 0 0 00
Stop
1
1
1
rr r r r 1 1 1 1 1 1 0 0 0 00
HSW
reg2,reg3
w w w w w 0 1 1 0 1 0 0 0 1 00
GR[reg3]
←
GR[reg2] (15 : 0) II GR[reg2]
(31: 16)
1
1
1
×
0
×
×
rr r r r 1 1 1 1 0 d d d d dd
dd d d d d d d d d d d d d d0
JARL
disp22,reg2
Note 7
GR[reg2]
←
PC+4
PC
←
PC+sign–extend(disp22)
2
2
2
JMP
[reg1]
00 0 0 0 0 0 0 0 1 1 R R R RR
PC
←
GR[reg1]
3
3
3
00 0 0 0 1 1 1 1 0 d d d d dd
dd d d d d d d d d d d d d d0
JR
disp22
Note 7
PC
←
PC+sign-extend(disp22)
2
2
2
rr r r r 1 1 1 0 0 0 R R R RR
LD.B
disp16[reg1],reg2
dd d d d d d d d d d d d d dd
adr
←
GR[reg1]+sign-extend(disp16)
GR[reg2]
←
sign-extend(Load-memory
(adr,Byte))
1
1
n
Note 9
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
UPD703100A 制造商:NEC 制造商全稱:NEC 功能描述:32-Bit Single-Chip Microcontrollers
UPD703100A-33 制造商:NEC 制造商全稱:NEC 功能描述:V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
UPD703100A-40 制造商:NEC 制造商全稱:NEC 功能描述:V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
UPD703100AF1-33-FA1 制造商:NEC 制造商全稱:NEC 功能描述:V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
UPD703100AF1-40-FA1 制造商:NEC 制造商全稱:NEC 功能描述:V850E/MS1TM 32/16-BIT SINGLE-CHIP MICROCONTROLLERS
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