2011-2012 Microchip Technology Inc.
DS39995C-page 215
PIC24FV32KA304 FAMILY
REGISTER 22-5:
AD1CHS: A/D SAMPLE SELECT REGISTER
R/W-0
CH0NB2
CH0NB1
CH0NB0
CH0SB4
CH0SB3
CH0SB2
CH0SB1
CH0SB0
bit 15
bit 8
R/W-0
CH0NA2
CH0NA1
CH0NA0
CH0SA4
CH0SA3
CH0SA2
CH0SA1
CH0SA0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 15-13
CH0NB<2:0>:
Sample B Channel 0 Negative Input Select bits
111
110
101
= AN4
100
= AN3
011
= AN2
010
= AN1
001
= AN0
000
= AVSS
bit 12-8
CH0SB<4:0>:
S/H Amplifier Positive Input Select for MUX B Multiplexer Setting bits
11111
= Unimplemented, do not use
11101
11101
11100
= Upper guardband rail (0.785 * VDD)
11011
= Lower guardband rail (0.215 * VDD)
11010
= Internal Band Gap Reference (VBG)(3) 11001
-10010 = Unimplemented, do not use
10001
= No channels are connected, all inputs are floating (used for CTMU)
10000
= No channels are connected, all inputs are floating (used for CTMU temperature sensor input)
01111
= AN15
01110
= AN14
01101
= AN13
01100
= AN12
01011
= AN11
01010
= AN10
01001
= AN9
01000
00111
00110
00101
00100
= AN4
00011
= AN3
00010
= AN2
00001
= AN1
00000
= AN0
bit 7-5
CH0NA<2:0>:
Sample A Channel 0 Negative Input Select bits
The same definitions as for CHONB<2:0>.
bit 4-0
CH0SA<4:0>:
Sample A Channel 0 Positive Input Select bits
The same definitions as for CHONA<4:0>.
Note 1:
This is implemented on 44-pin devices only.
2:
This is implemented on 28-pin and 44-pin devices only.
3:
The band gap value used for this input is 2x or 4x the internal VBG, which is selected when PVCFG<1:0> = 1x.