參數(shù)資料
型號: UPD720122
廠商: NEC Corp.
英文描述: MOS Integrated Circuit
中文描述: 馬鞍山集成電路
文件頁數(shù): 22/82頁
文件大小: 650K
代理商: UPD720122
Data Sheet S16685EJ2V0DS
22
μ
PD720122
(2) CPU bus write operation
Symbol
Parameter
Min.
Typ.
Max.
Unit
T11
Write cycle time
68
ns
T12
Address setup time (WRB
)
5
ns
T13
Chip select setup time (WRB
)
5
ns
T14
Write command width
34
ns
T15
Address hold time (WRB
)
5
ns
T16
Chip select hold time (WRB
)
5
ns
T17
WRB inactive time
34
ns
T18
Input data setup time
10
ns
T19
Input data hold time
0
ns
Remark
It is assumed that the external pin capacitance is 15 pF (data bus = 50 pF).
CPU bus write timing
WRB
RDB
A7 to A1
D15 to D0
CSB
VALID
t
12
t
13
t
14
t
19
t
15
t
16
t
18
High level
t
11
t
17
VALID
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