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參數(shù)資料
| 型號： | UPD720130 |
| 廠商： | NEC Corp. |
| 英文描述： | USB2.0 to IDE Bridge |
| 中文描述： | USB2.0轉(zhuǎn)IDE橋 |
| 文件頁數(shù)： | 1/44頁 |
| 文件大?。?/td> | 316K |
| 代理商： | UPD720130 |
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The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
MOS INTEGRATED CIRCUIT
μ
PD720130
USB2.0 to IDE Bridge
Document No.
Date Published
Printed in Japan
S16302EJ3V0DS00 (3rd edition)
June 2003 NS CP (K)
DATA SHEET
The mark shows major revised points.
2002
The
μ
PD720130 is designed to perform a bridge between USB 2.0 and ATA/ATAPI. The
μ
PD720130 complies
with the Universal Serial Bus Specification Revision 2.0
full-/high-speed signaling and works up to 480 Mbps. The
μ
PD720130 is integrated CISC processor, ATA/ATAPI controller, endpoint controller (EPC), serial interface engine
(SIE), and USB2.0 transceiver into a single chip. The USB2.0 protocol and class specific protocol (bulk only
protocol) are handled by USB2.0 transceiver, SIE, and EPC. And the transport layer is performed by V30MZ CISC
processor which is in the
μ
PD720130. The software to control the
μ
PD720130 is located in an embedded ROM. In
the future, the
μ
PD720130 will be released to support external Flash Memory / EEPROM option to update function
by firmware.
Detailed function descriptions are provided in the following user’s manual. Be sure to read the manual before designing.
μ
PD720130 User’s Manual: S16412E
FEATURES
Compliant with Universal Serial Bus Specification Revision 2.0 (Data Rate 12/480 Mbps)
Compliant with ATA/ATAPI-6 (LBA48, PIO Mode 0-4, Multi Word DMA Mode 0-2, Ultra DMA Mode 0-4)
USB2.0 high-speed bus powered device capability
Certified by USB implementers forum and granted with USB 2.0 high-speed Logo (TID :40320125)
One USB2.0 high-speed transceiver / receiver with full-speed transceiver / receiver
USB2.0 High-speed or Full-speed packet protocol sequencer (Serial Interface Engine)
Automatic chirp assertion and full-/high-speed mode change
USB Reset, Suspend and Resume signaling detection
Supports power control functionality for IDE device as CD-ROM and HDD
Supports set feature (TEST_MODE) functionality
System Clock is generated by 30 MHz X’tal
2.5 V and 3.3 V power supply
ORDERING INFORMATION
Part Number
Package
μ
PD720130GC-9EU
100-pin plastic TQFP (fine pitch) (14
×
14)
μ
PD720130GC-9EU-SIN
100-pin plastic TQFP (fine pitch) (14
×
14)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD720130GC-9EU-A | 制造商:NEC Electronics Corporation 功能描述:BRIDGE USB TO IDE SMD TQFP100 |
| UPD720133GB-YEU-A | 制造商:NEC Electronics Corporation 功能描述:IC BRIDGE USB TO IDE SMD TQFP64 |
| UPD720150F1-BAE-A | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 HOST/DEVICE CTRL, 884-P |
| UPD720150GK-9EU-A | 制造商:Renesas Electronics Corporation 功能描述:USB2.0 HOST/DEVICE CTRL, 80-PI 制造商:Renesas Electronics Corporation 功能描述:USB2.0 HOST PERIPHERAL CONTROLLER - Bulk 制造商:Renesas Electronics Corporation 功能描述:RENUPD720150GK-9EU-A USB2.0 HOST IC |
| UPD720200A | 制造商:Renesas Electronics Corporation 功能描述: |
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