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參數(shù)資料
| 型號： | UPD7281 |
| 廠商： | NEC Corp. |
| 英文描述： | IEEE1394 OHCI 1.1 COMPLIANT 3PORT PHY-LINK 1-CHIP HOST CONTROLLER |
| 中文描述： | IEEE1394連接的OHCI 1.1標(biāo)準(zhǔn)3PORT物理層鏈路1 -芯片的主機(jī)控制器 |
| 文件頁數(shù)： | 26/40頁 |
| 文件大?。?/td> | 297K |
| 代理商： | UPD7281 |
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Preliminary Data Sheet S15306EJ2V0DS
26
μ
PD72874
3.2 CardBus Mode Configuration Register (CARD_ON = High)
31
24
23
16
15
08
07
00
Device ID
Vendor ID
00H
Status
Command
04H
Class Code
Revision ID
08H
BIST
Header Type
Latency Timer
Cache Line Size
0CH
Base Address 0
10H
Base Address 1 (Cardbus Status Reg)
Note
14H
Base Address 2 (Cardbus Status Reg)
Note
18H
Reserved
1CH
Reserved
20H
Reserved
24H
Cardbus CIS Pointer
Note
28H
Subsystem ID
Subsystem Vendor ID
2CH
30H
Reserved
Cap_Ptr
34H
Reserved
38H
Max_Lat
Min_Gnt
Interrupt Pin
Interrupt Line
3CH
PCI_OHCI_Control
40H
Reserved
44H
Reserved
48H
Reserved
4CH
Reserved
50H
Reserved
54H
Reserved
58H
Reserved
5CH
Power Management Capabilities
Next_Item_Ptr
Cap_ID
60H
Reserved
Power Management Control/Status
64H
Reserved
68H
Reserved
6CH
Reserved
70H
Reserved
74H
Reserved
78H
Reserved
7CH
CIS Area
Note
80H
FCH
Note
Different from PCI Bus Mode Configuration Register.
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