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參數(shù)資料
| 型號(hào)： | UPD750004GBA-XXX-3BS-MTX |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | 10 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44 |
| 文件頁數(shù)： | 39/86頁 |
| 文件大?。?/td> | 626K |
| 代理商： | UPD750004GBA-XXX-3BS-MTX |
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PD750004, 750006, 750008, 750004(A), 750006(A), 750008(A)
42
Data Sheet U10738EJ3V2DS
(3) Symbols used for the addressing area column
Remarks 1. MB indicates the memory bank that can be accessed.
2. For *2, MB = 0 regardless of MBE and MBS settings.
3. For *4 and *5, MB = 15 regardless of MBE and MBS settings.
4. For *6 to *11, each addressable area is indicated.
(4) Description of machine cycle column
S indicates the number of machine cycles necessary for skipping any skip instruction. The value of S changes
as follows:
When no skip is performed
: S = 0
When a 1-byte or 2-byte instruction is skipped : S = 1
When a 3-byte instructionNote is skipped
: S = 2
Note 3-byte instruction: BR !addr, BRA !addr1, CALL !addr, and CALLA !addr1 instructions.
Caution The GETI instruction is skipped in one machine cycle.
One machine cycle is equal to one cycle (= tCY) of the CPU clock (
Φ), and four types of times are available for
selection according to the PCC setting.
* 1
MB = MBE MBS (MBS = 0, 1, 15)
* 2
MB = 0
* 3
MBE = 0
MBE = 1
:
MB = 0 (000H - 07FH), MB = 15 (F80H - FFFH)
MB = MBS (MBS = 0, 1, 15)
* 4
MB = 15, fmem = FB0H - FBFH, FF0H - FFFH
* 5
MB = 15, pmem = FC0H - FFFH
* 6
addr = 0000H - 0FFFH ( PD750004), 0000H - 17FFH ( PD750006)
0000H - 1FFFH ( PD750008)
* 7
addr, addr1 = (Current PC) - 15 to (Current PC) - 1
(Current PC) + 2 to (Current PC) + 16
* 8
caddr = 0000H - 0FFFH ( PD750004)
0000H - 0FFFH (PC12 = 0:
PD750006, 750008)
1000H - 17FFH (PC12 = 1:
PD750006)
1000H - 1FFFH (PC12 = 1:
PD750008)
* 9
faddr = 0000H - 07FFH
* 10
taddr = 0020H - 007FH
Data memory
addressing
Program memory
addressing
Mk
ΙΙ mode only
addr1 =
0000H - 0FFFH ( PD750004)
0000H - 17FFH ( PD750006)
0000H - 1FFFH ( PD750008)
* 11
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