參數(shù)資料
型號: UPD75208CW
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機
文件頁數(shù): 17/62頁
文件大?。?/td> 497K
代理商: UPD75208CW
17
μ
PD75208
5.4
WATCH TIMER
The
μ
PD75208 incorporates one channel of watch timer. The watch timer has the following functions:
Sets the test flag (IRQW) at 0.5 sec intervals.
The standby mode can be released by IRQW.
0.5 second interval can be set with the main system clock and subsystem clock.
The fast mode enables to set 128-time (3.91 ms) interval useful to program debugging and inspection.
The fixed frequencies (2.048 kHz) can be output to the P23/BUZ pin for use to generate buzzer sound
and trim the system clock oscillator frequency.
Since the frequency divider can be cleared, the watch can be started from zero second.
Fig. 5-3 Watch Timer Block Diagram
Remarks
Values at f
XX
= 4.194304 MHz and f
XT
= 32.768 kHz are indicated in parentheses.
8
Internal Bus
WM7 WM6
WM5
WM4
WM2
WM1
WM0
P23
Output
Latch
Port 2
Input/Output
Mode
PORT2.3
Bit 2 of PMGB
P23/BUZ
Output Buffer
Selector
Frequency Divider
Clear
(2.048 kHz)
2
14
f
W
2
7
f
W
(256 Hz : 3.91 ms)
f
W
(32.768 kHz)
Selector
WM
From
Clock
Generator
16
f
W
128
(32.768 kHz)
f
XX
f
XT
(32.768 kHz)
INTW
IRQW
Set Signal
2Hz
0.5 sec
WM3
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