參數(shù)資料
型號(hào): UPD753036GCA
廠商: NEC Corp.
英文描述: DIODE ZENER SINGLE 500mW 60Vz 2.1mA-Izt 0.05 0.1uA-Ir 46Vr DO35-GLASS 5K/REEL
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 24/88頁(yè)
文件大小: 483K
代理商: UPD753036GCA
24
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
6.4 Clock Output Circuit
The clock output circuit is provided to output the clock pulses from the P22/PCL/PTO2 pin, and used to apply
to the remote control waveform outputs and to supply clock pulses to the peripheral LSIs.
Clock output (PCL):
Φ
, 524, 262, 65.5 kHz (main system clock: at 4.19 MHz operation)
Φ
, 750, 375, 93.8 kHz (main system clock: at 6.0 MHz operation)
Figure 6-3. Clock Output Circuit Block Diagram
Remark
Special care has been taken in designing the chip so that small-width pulses may not be output
when switching clock output enable/disable.
From clock
generator
Φ
f
X
/2
3
f
X
/2
4
f
X
/2
6
Selector
CLOM3
0
CLOM1 CLOM0
4
CLOM
P22
output latch
Port 2 I/O mode
specification bit
PORT2.2
Bit 2 of PMGB
Internal bus
Output buffer
PCL/P22PTO2
Selector
From timer/event
counter (channel 2)
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