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參數(shù)資料
| 型號： | UPD753036GCA |
| 廠商： | NEC Corp. |
| 英文描述： | DIODE ZENER SINGLE 500mW 60Vz 2.1mA-Izt 0.05 0.1uA-Ir 46Vr DO35-GLASS 5K/REEL |
| 中文描述： | 4位單片機(jī) |
| 文件頁數(shù)： | 56/88頁 |
| 文件大小： | 483K |
| 代理商： | UPD753036GCA |
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56
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
Subsystem Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Oscillator
Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Crystal
resonator
Oscillation frequency
(f
XT
)
Note 1
32
32.768
35
kHz
Oscillation
stabilization time
Note 2
V
DD
= 4.5 to 5.5 V
1.0
2
s
10
External
clock
XT1 input frequency
(f
XT
)
Note 1
32
100
kHz
XT1 input high-,
low-level widths
(t
XTH
, t
XTL
)
5
15
μ
s
Notes 1.
The oscillation frequency shown above indicate characteristics of the oscillator only. For the instruction
execution time, refer to
AC Characteristics
.
The oscillation stabilization time is the time required for oscillation to be stabilized after V
DD
has been
applied.
2.
Caution When using the subsystem clock oscillator, wire the portion enclosed in the dotted line in the
above figure as follows to prevent adverse influences due to wiring capacitance:
Keep the wiring length as short as possible.
Do not cross the wiring with other signal lines.
Do not route the wiring in the vicinity of a line through which a high alternating current flows.
Always keep the ground point of the capacitor of the oscillator at the same potential as V
DD
.
Do not ground to a power supply pattern through which a high current flows.
Do not extract signals from the oscillator.
The subsystem clock oscillator has a low amplification factor to reduce current consumption
and is more susceptible to noise than the main system clock oscillator. Therefore, exercise
utmost care in wiring the subsystem clock oscillator.
XT1
XT2
C3
C4
V
DD
R
XT1
XT2
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