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參數(shù)資料
| 型號(hào)： | UPD753036GCA |
| 廠商： | NEC Corp. |
| 英文描述： | DIODE ZENER SINGLE 500mW 60Vz 2.1mA-Izt 0.05 0.1uA-Ir 46Vr DO35-GLASS 5K/REEL |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 55/88頁(yè) |
| 文件大?。?/td> | 483K |
| 代理商： | UPD753036GCA |
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55
μ
PD753036, 753036(A)
Data Sheet U11353EJ4V0DS00
Main System Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Oscillator
Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Ceramic
oscillator
Oscillation frequency
(f
X
)
Note 1
1.0
6.0
Note 2
MHz
Oscillation
stabilization time
Note 3
After V
DD
has
reached MIN. value of
oscillation voltage
range
4
ms
Crystal
resonator
Oscillation frequency
(f
X
)
Note 1
1.0
6.0
Note 2
MHz
Oscillation
stabilization time
Note 3
V
DD
= 4.5 to 5.5 V
10
ms
30
External
clock
X1 input frequency
(f
X
)
Note 1
1.0
6.0
Note 2
MHz
X1 input high-,
low-level widths
(t
XH
, t
XL
)
83.3
500
ns
Notes 1.
The oscillation frequency and X1 input frequency shown above indicate characteristics of the oscillator
only. For the instruction execution time, refer to
AC Characteristics
.
If the oscillation frequency is 4.19 MHz < f
X
< 6.0 MHz at 1.8 V
≤
V
DD
< 2.7 V, do not select the processor
clock control register (PCC) = 0011. If PCC = 0011, one machine cycle is less than 0.95
μ
s, falling
short of the rated value of 0.95
μ
s.
The oscillation stabilization time is the time required for oscillation to be stabilized after V
DD
has been
applied or STOP mode has been released.
2.
3.
Caution When using the main system clock oscillator, wire the portion enclosed in the dotted line in the
above figure as follows to prevent adverse influences due to wiring capacitance:
Keep the wiring length as short as possible.
Do not cross the wiring with other signal lines.
Do not route the wiring in the vicinity of a line through which a high alternating current flows.
Always keep the ground point of the capacitor of the oscillator at the same potential as V
DD
.
Do not ground to a power supply pattern through which a high current flows.
Do not extract signals from the oscillator.
X1
X2
C1
C2
V
DD
X1
X2
C1
C2
V
DD
X1
X2
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