參數(shù)資料
型號： UPD75312A
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述： 4位單片機
文件頁數(shù)： 41/62頁
文件大小： 577K
代理商： UPD75312A
μ
PD75312(A), 75316(A)
41
Ma-
chine
Cyc-
les
Ad-
dress-
ing
Area
Instruc-
tions
Mne-
monics
Operand
Bytes
Operation
Skip
Conditions
Branch
BR
addr
—
—
PC
13-0
←
addr
(The most suitable instruction
is selectable from among BR
!addr, BRCB !caddr, and BR
$addr depending on the
assembler.)
PC
13-0
←
addr
PC
13-0
←
addr
PC
13-0
←
PC
13,12 +
caddr
11-0
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, 0, PC
13
, PC
12
PC
13-0
←
addr, SP
←
SP-4
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, 0, PC
13
, PC
12
PC
13-0
←
00, faddr, SP
←
SP-4
MBE, PC
13
, PC
12
←
(SP+1)
3, 1, 0
PC
11-0
←
(SP)(SP+3)(SP+2)
SP
←
SP+4
MBE, PC
13
, PC
12
←
(SP+1)
3, 1, 0
PC
11-0
←
(SP)(SP+3)(SP+2)
SP
←
SP+4,
then skip unconditionally
PC
13
, PC
12
←
(SP+1)
1, 0
PC
11-0
←
(SP)(SP+3)(SP+2)
PSW
←
(SP+4)(SP+5), SP
←
SP+6
(SP-1)(SP-2)
←
rp, SP
←
SP-2
(SP-1)
←
MBS, (SP-2)
←
0, SP
←
SP-2
rp
←
(SP+1)(SP), SP
←
SP+2
MBS
←
(SP+1), SP
←
SP+2
IME
←
1
IExxx
←
1
IME
←
0
IExxx
←
0
A
←
PORT
n
XA
←
PORT
n+1
,PORT
n
PORT
n
←
A
PORT
n+1
,PORT
n
←
XA
Set HALT Mode (PCC.2
←
1)
Set STOP Mode (PCC.3
←
1)
No Operation
MBS
←
n (n = 0, 1, 15)
.Where TBR instruction,
13-0
←
(taddr)
5-0
+(taddr+1)
.Where TCALL instruction,
(SP-4)(SP-1)(SP-2)
←
PC
11-0
(SP-3)
←
MBE, 0, PC
13
, PC
12
PC
13-0
←
(taddr)
5-0
+(taddr+1)
←
SP-4
.Except for TBR and TCALL
instructions,
Instruction execution of
(taddr)(taddr+1)
*6
!addr
$addr
!caddr
3
1
2
3
2
2
*6
*7
*8
BRCB
CALL
!addr
3
3
*6
CALLF
!faddr
2
2
*9
RET
1
3
RETS
1
3+S
Undefined
RETI
1
3
PUSH
rp
BS
rp
1
2
1
1
2
1
POP
BS
2
2
2
2
2
2
2
2
Inter-
rupt
Control
EI
IExxx
DI
IExxx
A,PORTn
XA,PORTn
PORTn,A
2
2
2
2
2
2
2
2
I/O
IN
(n = 0-7)
(n = 4, 6)
OUT
(n = 2-7)
PORTn,XA
2
2
2
1
2
2
2
1
(n = 4, 6)
CPU
Control
HALT
STOP
NOP
Special
SEL
GETI
MBn
taddr
2
1
2
3
*10
Depends on
referenced
instruction
Note:
When executing the IN/OUT instruction, MBE = 0, or MBE = 1, and MBS = 15.
Remarks:
The TBR and TCALL instructions are the assembler pseudo-instructions for the table definition
of GETI instruction.
Subrou-
tine/
Stack
Control
....PC
.............................
....SP
.............................
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