參數(shù)資料
型號(hào)： UPD75512A
廠商： NEC Corp.
英文描述： 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述： 4位單片機(jī)
文件頁(yè)數(shù)： 26/64頁(yè)
文件大小： 494K
代理商： UPD75512A
μ
PD75512(A)
26
Internal bus
Modulo register H (8)
MODL
MODH
Modulo register L (8)
TPGM3
TPGM1
f
x
1/2
Frequency divider
MODH(8)
MODL (6)
Modulo latch (14)
PWM pulse generator
IRQTPG set signal
( f
x
x
2
15
INTTPG
TPGM5
TPGM7
Selector
Output buffer
PPO
Fig. 5-7 Timer/Pulse Generator Block Diagram (PWM Pulse Generation Mode)
5.8 SERIAL INTERFACE
The
μ
PD75512(A) is provided with two serial interface channels. Table 5-2 indicates differences between channel
0 and channel 1.
Table 5-2 Differences Between Channel 0 and Channel 1
Serial Transfer Mode, Funciton
Channel 0
Channel 1
Clock Selection
f
X
/2
4
, f
X
/2
3
, TOUT F/F, external clock
f
X
/2
4
, f
X
/2
3
external clock
3-Line
Serial I/O
Transfer Method
MSB first/LSB first selectable
MSB first
Transfer Completion
Flag
Serial transfer completion interrupt
request flag (IRQCSI0)
Serial transfer completion flag (EOT)
2-Line Serial I/O
Usable
Unprovided
Serial Bus Interface (SBI)
(1)
Serial interface function (Channel 0)
The
μ
PD75512(A) is equipped with the following four modes:
Operation stop mode
Three-line serial I/O mode
Two-line serial I/O mode
SBI mode (serial bus interface mode)
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