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124
μ
PD75517(A)
4.11 BIT SEQUENTIAL BUFFER: 16 BITS
The bit sequential buffer is special data memory for bit manipulations. In particular, the buffer allows bit
manipulations to be performed very easily by sequentially changing address and bit specifications. So the
buffer is useful in processing long data bit by bit.
This data memory consists of 16 bits, and allows pmem.@L addressing with a bit manipulation instruction
and also allows indirect bit specification using the L register. In this case, only by incrementing or
decrementing the L register in a program loop, the bit to be manipulated can be sequentially shifted for
continued processing.
Fig. 4-63 Format of the Bit Sequential Buffer
Remark
In pmem.@L addressing, bit specification is shifted according to the L register.
Data can also be manipulated using direct addressing. The buffer can be used for applications such as
continuous 1-bit data input or output operations by combining direct 1-bit, 4-bit, and 8-bit addressing with
pmem.@L addressing. In 8-bit manipulation, the higher eight bits or lower eight bits can be manipulated by
specifying BSB0 or BSB2.
Example
The 16-bit data of BUFF1 and BUFF2 are output from bit 0 of port 3 in serial mode.
Program example
CLR1
MBE
MOV
XA, BUFF1
MOV
BSB0, XA
; Set BSB0, 1
MOV
XA, BUFF2
MOV
BSB2, XA
; Set BSB2, 3
MOV
L, #0
LOOP0:
SKT
BSB0, @L
; Test specified BSB bit
BR
LOOP1
NOP
; Dummy (timing adjustment)
SET1
PORT3.0
; Set bit 0 of port 3
BR
LOOP2
LOOP1:
CLR1
PORT3.0
; Clear bit 0 of port 3
NOP
; Dummy (timing adjustment)
NOP
LOOP2:
INCS
L
; L
←
L+1
BR
LOOP0
RET
3
2
1
0
3
2
1
0
3
2
1
0
3
2
1
0
BSB3
BSB2
BSB1
BSB0
FC3H
FC2H
FC1H
FC0H
L = F
L = C L = B
L = 8 L = 7
L = 4 L = 3
L = 0
DECS L
INCS L
Address
Bit
L register
Symbol