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參數(shù)資料
| 型號(hào)： | UPD75517A |
| 廠商： | NEC Corp. |
| 英文描述： | 4 BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機(jī) |
| 文件頁(yè)數(shù)： | 15/180頁(yè) |
| 文件大小： | 1596K |
| 代理商： | UPD75517A |
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15
μ
PD75517(A)
2. ARCHITECTURE AND MEMORY MAP OF THE
μ
PD75517(A)
The
μ
PD75517(A) has three architectural features:
(a) Data memory bank configuration
(b) General register bank configuration
(c) Memory-mapped I/O
Each of these features is explained below.
2.1 DATA MEMORY BANK CONFIGURATION AND ADDRESSING MODES
As shown in Fig. 2-1, the data memory space of the
μ
PD75517(A) contains a static RAM (1024 words
×
4
bits) at addresses 000H to 3FFH and peripheral hardware (such as I/O ports and timers) at addresses F80H to
FFFH. To address a 12-bit address in this data memory space, the
μ
PD75517(A) uses such a memory bank
configuration that the low-order eight bits are specified with an instruction directly or indirectly, and the high-
order four bits are used to specify a memory bank (MB).
To specify a memory bank (MB), a memory bank enable flag (MBE) and memory bank select register (MBS)
are contained, allowing the addressing indicated in Fig. 2-1 and 2-2 and Table 2-1. (The MBS is a register used
to select a memory bank, and can be set to 0, 1, 2, 3, or 15. The MBE is a flag used to determine whether a
memory bank selected using the MBS register is to be enabled. The MBE is automatically saved or restored
at the time of interrupt processing or subroutine processing, so that it can be freely set in interrupt processing
and subroutine processing.)
In addressing data memory space, the MBE is usually set to 1 (MBE = 1), and the static RAM in the memory
bank specified by the MBS is operated. However, the MBE = 0 mode or the MBE = 1 mode can be selected
for each step of program processing for more efficient programming.
The MBE and MBS are set as indicated below.
Example
SET1 MBE
CLR1 MBE
SEL MB0
SEL MB1
SEL MB15
; MBE
←
1
; MBE
←
0
; MBS
←
0
; MBS
←
1
; MBS
←
15
Interrupt processing
Processing that repeats internal hardware and static RAM operations
Subroutine processing
Usual program processing
MBE = 0 mode
MBE = 1 mode
Applicable program processing
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| UPD7554AG-597-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-597-E2-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-603-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-603-E2-A | 制造商:Renesas Electronics Corporation 功能描述: |
| UPD7554AG-611-E2 | 制造商:Renesas Electronics Corporation 功能描述: |
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