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參數(shù)資料
| 型號： | UPD75P316BGC-3B9 |
| 廠商： | NEC Corp. |
| 英文描述： | 4-BIT SINGLE-CHIP MICROCOMPUTER |
| 中文描述： | 4位單片機 |
| 文件頁數(shù)： | 12/46頁 |
| 文件大?。?/td> | 404K |
| 代理商： | UPD75P316BGC-3B9 |
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μ
PD75P316B
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3.
DATA MEMORY (RAM)
Fig. 3-1 shows the data memory configuration. It consists of a data area and a peripheral hardware area.
The data area consists of memory banks 0 to 3 with each bank consisting of 256 words x 4 bits.
Peripheral hardware has been assigned to the area of memory bank 15.
(1)
Data area
The data area comprises a static RAM. It is used to store program data and as a subroutine, interrupt
execution stack memory. Even if the CPU operation is stopped in the standby mode, it is possible to hold the
memory content for a long time by battery backup, etc. The data area is operated by memory manipulation
instructions.
The static RAM has been mapped to memory banks 0, 1, 2 and 3 by 256 x 4 bits each. Bank 0 has been
mapped as a data area but is also available as a general register area (000H to 007H) and a stack area (000H
to 0FFH) (banks 1, 2 and 3 are available only as a data area).
In the static RAM, 1 address consists of 4 bits. It can be operated in units of 8 bits by 8-bit memory ma-
nipulation instructions or in bits by bit manipulation instructions, however. In an 8-bit manipulation instruc-
tion, an even address should be specified.
(a)
General register area
The general register area can be operated either by general register operation instructions or by memory
manipulation instructions. Up to eight 4-bit registers are available. That part of the 8 general registers
which is not used in the program is available as a data area or a stack area.
(b)
Stack area
The stack area is set by an instruction. It is available as a subroutine execution or interrupt service
execution save area.
(2)
Peripheral hardware area
The peripheral hardware area has been mapped to F80H to FFFH of memory bank 15.
It is operated by memory manipulation instructions just as the static RAM. In the peripheral hardware,
however, the operable bit unit differs from one address to another. An address to which peripheral hardware
has not been assigned is inaccessible since no data memory is built in.
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