參數(shù)資料
型號(hào): UPD75P316BGC-3B9
廠商: NEC Corp.
英文描述: 4-BIT SINGLE-CHIP MICROCOMPUTER
中文描述: 4位單片機(jī)
文件頁(yè)數(shù): 28/46頁(yè)
文件大?。?/td> 404K
代理商: UPD75P316BGC-3B9
28
μ
PD75P316B
1.8
μ
s
3.4
64
μ
s
f
TI
0
275
kHz
t
INTH
,
t
INTL
* 1.
The CPU clock (
Φ
) cycle time (minimum instruc-
tion execution time) is determined by the oscil-
lation frequency of the connected resonator,
the system clock control register (SCC), and the
processor clock control register (PCC).
The graph on the right shows the characteristic
of the cycle time t
CY
against the supply current
V
DD
in the case of main system clock operation.
2t
CY
or 128/f
X
depending on the setting of the
interrupt mode register (IMO).
2.
t
CY
vs V
DD
(Operating on Main System Clock)
C
C
μ
s
Supply Voltage V
DD
[V]
0
1
2
3
4
5
6
0.5
1
2
3
4
5
30
70
6
Guaranteed
Operation Range
114
122
125
μ
s
AC CHARACTERISTICS (Ta = –40 to +85
°
C, V
DD
= 2.0 to 6.0 V)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN.
TYP.
MAX.
UNIT
V
DD
= 2.7 to 6.0 V
3.8
64
μ
s
Operating on main
system clock
V
DD
= 2.0 to 6.0 V
5
64
μ
s
t
CY
Ta = –40 to + 60
°
C
V
DD
= 2.2 to 6.0 V
Operating on
subsystem clock
TI0 input
frequency
TI0 input high-/low-
level width
t
TIH
,
t
TIL
INT0
*2
μ
s
INT1, 2, 4
10
μ
s
KR0 to KR7
10
μ
s
RESET low-level
width
t
RSL
10
μ
s
Interrupt input
high-/low-level
width
CPU clock
cycle time
(minimum instruc-
tion execution time
= 1 machine
cycle)
*1
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