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參數(shù)資料
| 型號： | UPD77018GC |
| 廠商： | NEC Corp. |
| 英文描述： | CAT5E PATCH CABLES SNAGLESS,GREEN,10 FT |
| 中文描述： | 16位定點數(shù)字信號處理器 |
| 文件頁數(shù)： | 11/60頁 |
| 文件大小： | 424K |
| 代理商： | UPD77018GC |
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11
μ
PD77015, 77017, 77018
Remark
The state of the pins added 3S becomes high impedance when bus release signal (HOLDAK = 0) is output.
External data memory interface
Symbol
Pin No.
I/O
Function
X/Y
7
O
Memory select signal output
0: X memory is used.
1: Y memory is used.
(3S)
DA13 - DA0
8, 9, 12 -19, 22 - 25
O
Address bus to external data memory
External data memory is accessed.
During the external memory is not accessed, these pins
keep the previous level.
These pins are set to low level; 0000H, by reset.
They continue outputting low level until the first external
memory access.
(3S)
D15 - D0
26 -29, 32 - 35, 38 - 41,
44 - 47
I/O
(3S)
16 bits data bus to external data memory
External data memory is accessed.
MRD
98
O
Read output
Reads external memory
(3S)
MWR
95
O
Write output
Writes external memory
(3S)
WAIT
100
I
Wait signal input
Wait cycle is input when external memory is read.
1: No wait
0: Wait
HOLDRQ
93
I
Hold request signal input
Input low level when external data memory bus is
expected to use.
BSTB
99
O
Bus strobe signal output
Outputs low level while the
μ
PD77017 is occupying
external memory bus.
HOLDAK
94
O
Hold acknowledge signal output
Outputs low level when the
μ
PD77017 permits external
device to use external data memory bus.
相關PDF資料 |
PDF描述 |
|---|---|
| UPD77018 | 16 bits, Fixed-point Digital Signal Processor |
| UPD77015GC | 16 bits, Fixed-point Digital Signal Processor |
| UPD77017 | 16 bits, Fixed-point Digital Signal Processor |
| UPD77017GC | 16 bits, Fixed-point Digital Signal Processor |
| UPD77016 | 16 bits, Fixed-point Digital Signal Processor |
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