參數(shù)資料
型號(hào)： UPD780024A
廠商： NEC Corp.
元件分類： 8位微控制器
英文描述： 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述： 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁(yè)數(shù)： 14/90頁(yè)
文件大小： 660K
代理商： UPD780024A
μ
PD78F0034B, 78F0034BY, 78F0034B(A), 78F0034BY(A)
14
Data Sheet U16369EJ1V0DS
3.1 Port Pins (2/2)
Pin Name
I/O
Function
After Reset
Alternate
Function
P70
I/O
Port 7
6-bit I/O port.
Input/output can be specified in 1-bit units.
An on-chip pull-up resistor can be specified by software.
Input
TI00/TO0
P71
TI01
P72
TI50/TO50
P73
TI51/TO51
P74
PCL
P75
BUZ
3.2 Non-Port Pins (1/2)
Pin Name
I/O
Function
After Reset
Alternate
Function
INTP0
Input
External interrupt request input by which the valid edge (rising edge,
falling edge, or both rising and falling edges) can be specified.
Input
P00
INTP1
P01
INTP2
P02
INTP3
P03/ADTRG
SI30
Input
Serial interface serial data input.
Input
P20
SI31
Note 1
P34
SDA0
Note 2
I/O
Serial interface serial data input/output
Input
P32
SO30
Output
Serial interface serial data output.
Input
P21
SO31
Note 1
P35
SCK30
I/O
Serial interface serial clock input/output.
Input
P22
SCK31
Note 1
P36
SCL0
Note 2
P33
RxD0
Input
Serial data input for asynchronous serial interface.
Input
P23
TxD0
Output
Serial data output for asynchronous serial interface.
Input
P24
ASCK0
Input
Serial clock input for asynchronous serial interface.
Input
P25
TI00
Input
External count clock input to 16-bit timer/event counter 0.
Capture trigger signal input to capture register 01 (CR01) of 16-bit timer/
event counter 0.
Input
P70/TO0
TI01
Capture trigger signal input to capture register 00 (CR00) of 16-bit timer/
event counter 0.
P71
TI50
External count clock input to 8-bit timer/event counter 50.
P72/TO50
TI51
External count clock input to 8-bit timer/event counter 51.
P73/TO51
TO0
Output
16-bit timer/event counter 0 output.
Input
P70/TI00
TO50
8-bit timer/event counter 50 output (shared with 8-bit PWM output).
Input
P72/TI50
TO51
8-bit timer/event counter 51 output (shared with 8-bit PWM output).
P73/TI51
PCL
Output
Clock output (for trimming of main system clock and subsystem clock).
Input
P74
BUZ
Output
Buzzer output.
Input
P75
AD0 to AD7
I/O
Lower address/data bus for extending memory externally.
Input
P40 to P47
Notes 1.
SI31, SO31, and SCK31 are incorporated only in the
μ
PD78F0034B and 78F0034B(A).
SDA0 and SCL0 are incorporated only in the
μ
PD78F0034BY and 78F0034BY(A).
2.
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