參數(shù)資料
型號(hào)： UPD780024A
廠商： NEC Corp.
元件分類： 8位微控制器
英文描述： 8-bit Microcontroller with 2/4/8K Bytes In-System Programmable Flash
中文描述： 8位微控制器與2/4/8K字節(jié)在系統(tǒng)可編程閃存
文件頁(yè)數(shù)： 31/90頁(yè)
文件大小： 660K
代理商： UPD780024A
μ
PD78F0034B, 78F0034BY, 78F0034B(A), 78F0034BY(A)
31
Data Sheet U16369EJ1V0DS
Subsystem Clock Oscillator Characteristics (T
A
= –40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Resonator
Recommended Circuit
Parameter
Conditions
MIN.
TYP.
MAX.
Unit
Crystal
resonator
Oscillation
frequency (f
XT
)
Note 1
32
32.768
35
kHz
Oscillation
stabilization time
Note 2
4.0 V
≤
V
DD
≤
5.5 V
1.2
2
s
1.8 V
≤
V
DD
<
4.0 V
10
External
clock
X1 input
frequency (f
XT
)
Note 1
32
38.5
kHz
X1 input high-/low-level
width (t
XTH
, t
XTL
)
12
15
μ
s
Notes 1.
Indicates only oscillator characteristics. Refer to
AC Characteristics
for instruction execution time.
2.
Time required to stabilize oscillation after V
DD
reaches oscillator voltage MIN.
Cautions 1. When using the subsystem clock oscillator, wire as follows in the area enclosed by the
broken lines in the above figures to avoid an adverse effect from wiring capacitance.
Keep the wiring length as short as possible.
Do not cross the wiring with the other signal lines.
Do not route the wiring near a signal line through which a high fluctuating current flows.
Always make the ground point of the oscillator capacitor to the same potential as V
SS1
.
Do not ground the capacitor to a ground pattern through which a high current flows.
Do not fetch signals from the oscillator.
2. The subsystem clock oscillator is designed as a low-amplitude circuit for reducing power
consumption, and is more prone to malfunction due to noise than the main system clock
oscillator. Particular care is therefore required with the wiring method when the subsystem
clock is used.
Remark
For the resonator selection and oscillator constant, customers are required to either evaluate the
oscillation themselves or apply to the resonator manufacturer for evaluation.
C3
XT2
XT1V
PP
R2
C4
XT1
XT2
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