參數(shù)資料
型號(hào)： UPD780024AGB-xxx-8EU
廠商： NEC Corp.
元件分類(lèi)： 8位微控制器
英文描述： 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 8位單晶片微控制器
文件頁(yè)數(shù)： 61/96頁(yè)
文件大?。?/td> 661K
代理商： UPD780024AGB-XXX-8EU
61
μ
PD780021A, 780022A, 780023A, 780024A, 780021AY, 780022AY, 780023AY, 780024AY
Data Sheet U14042EJ4V0DS
DC Characteristics (T
A
=
–
40 to +85
°
C, V
DD
= 1.8 to 5.5 V)
Parameter
Power supply
current
Note 1
Symbol
I
DD1
Note 2
Conditions
V
DD
= 5.0 V
±
10%
Note 3
MIN.
TYP.
5.5
MAX.
11
Unit
mA
8.38 MHz
crystal oscillation
operating mode
When A/D converter is
stopped
When A/D converter is
operating
Note 6
6.5
13
mA
5.00 MHz
crystal oscillation
operating mode
V
DD
= 3.0 V
±
10%
Note 3
When A/D converter is
stopped
2
4
mA
When A/D converter is
operating
Note 6
3
6
mA
V
DD
= 2.0 V
±
10%
Note 4
When A/D converter is
stopped
0.4
1.5
mA
When A/D converter is
operating
Note 6
1.4
4.2
mA
I
DD2
8.38 MHz
crystal oscillation
HALT mode
V
DD
= 5.0 V
±
10%
Note 3
When peripheral functions
are stopped
1.1
2.2
mA
When peripheral functions
are operating
4.7
mA
5.00 MHz
crystal oscillation
HALT mode
V
DD
= 3.0 V
±
10%
Note 3
When peripheral functions
are stopped
0.35
0.7
mA
When peripheral functions
are operating
1.7
mA
V
DD
= 2.0 V
±
10%
Note 4
When peripheral functions
are stopped
0.15
0.4
mA
When peripheral functions
are operating
1.1
mA
I
DD3
32.768 kHz crystal oscillation
V
DD
= 5.0 V
±
10%
40
80
μ
A
operating mode
Note 5
V
DD
= 3.0 V
±
10%
20
40
μ
A
V
DD
= 2.0 V
±
10%
10
20
μ
A
I
DD4
32.768 kHz crystal oscillation
V
DD
= 5.0 V
±
10%
30
60
μ
A
HALT mode
Note 5
V
DD
= 3.0 V
±
10%
6
18
μ
A
V
DD
= 2.0 V
±
10%
2
10
μ
A
I
DD5
XT1 = V
DD
STOP mode
V
DD
= 5.0 V
±
10%
0.1
30
μ
A
When feedback resistor is not used
V
DD
= 3.0 V
±
10%
0.05
10
μ
A
V
DD
= 2.0 V
±
10%
0.05
10
μ
A
Notes 1.
Total current through the internal power supply (V
DD0
, V
DD1
) (except the current through pull-up resistors
of ports).
2.
I
DD1
includes the peripheral operation current.
3.
When the processor clock control register (PCC) is set to 00H.
4.
When PCC is set to 02H.
5.
When main system clock operation is stopped.
6.
Includes the current through the AV
DD
pin.
相關(guān)PDF資料
PDF描述
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