參數(shù)資料
型號(hào)： UPD780024AGC-xxx-AB8
廠商： NEC Corp.
元件分類(lèi)： 8位微控制器
英文描述： 8-BIT SINGLE-CHIP MICROCONTROLLERS
中文描述： 8位單晶片微控制器
文件頁(yè)數(shù)： 32/96頁(yè)
文件大?。?/td> 661K
代理商： UPD780024AGC-XXX-AB8
32
μ
PD780021A, 780022A, 780023A, 780024A, 780021AY, 780022AY, 780023AY, 780024AY
Data Sheet U14042EJ4V0DS
(3) Serial interface IIC0 (
μ
PD780024AY Subseries only)
Serial interface IIC0 has one mode: I
2
C (Inter IC) bus mode (supporting multimaster).
I
2
C bus mode (supporting multimaster)
This is an 8-bit data transfer mode using two lines: a serial clock line (SCL0) and a serial data bus line
(SDA0).
This mode complies with the I
2
C bus format, and can output a
“
start condition
”
,
“
data
”
, and a
“
stop condition
”
during transmission via the serial data bus. This data is automatically detected by hardware during
reception.
Since SCL0 and SDA0 are open-drain outputs in IIC0, pull-up resistors for the serial clock line and the serial
data bus line are required.
Figure 5-11. Block Diagram of Serial Interface IIC0
Internal bus
IIC status register 0
(IICS0)
IIC control register 0
(IICC0)
Slave address
register 0 (SVA0)
Noise eliminator
Noise eliminator
Match
signal
IIC shift register 0
(IIC0)
SO0 latch
IICE0
D
SET
CLEAR
CL00
SDA0/P32
SCL0/P33
N-ch open-
drain output
Data hold
time corrector
Acknowledge
detector
Wake-up controller
Acknowledge
detector
Stop condition
detector
Serial clock counter
Interrupt request
signal generator
Serial clock controller
N-ch open-drain
output
Serial clock wait
controller
Prescaler
INTIIC0
f
X
CLD0
IIC transfer clock select
register 0 (IICCL0)
Internal bus
LREL0
WREL0
SPIE0
WTIM0
ACKE0
STT0
SPT0
MSTS0
ALD0 EXC0
COI0
TRC0
ACKD0
STD0 SPD0
Start condition
detector
DAD0 SMC0 DFC0 CL00
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