參數(shù)資料
型號： UPD78F9511GR-JJG-A
廠商： Renesas Electronics America
文件頁數(shù)： 155/175頁
文件大小： 0K
描述： MCU 8BIT SGL CHIP 16PIN
標(biāo)準(zhǔn)包裝： 400
系列： 78K0S/Kx1+
核心處理器： 78K0S
芯體尺寸： 8-位
速度： 10MHz
外圍設(shè)備： LVD，POR，PWM，WDT
輸入/輸出數(shù)： 13
程序存儲器容量： 2KB（2K x 8）
程序存儲器類型： 閃存
RAM 容量： 128 x 8
電壓 - 電源 (Vcc/Vdd)： 2 V ~ 5.5 V
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 16-SSOP（0.173"，4.40mm 寬）
包裝： 托盤
CHAPTER 5 CLOCK GENERATORS
User’s Manual U16994EJ6V0UD
78
(3) Oscillation stabilization time select register (OSTS)
This register is used to select oscillation stabilization time of the clock supplied from the oscillator when the STOP
mode is released. The wait time set by OSTS is valid only when the crystal/ceramic oscillation clock is selected
as the system clock and after the STOP mode is released. If the high-speed internal oscillator or external clock
input is selected as the system clock source, no wait time elapses.
The system clock oscillator and the oscillation stabilization time that elapses after power application or release of
reset are selected by the option byte. For details, refer to CHAPTER 15 OPTION BYTE.
OSTS is set by using an 8-bit memory manipulation instruction.
Figure 5-5. Format of Oscillation Stabilization Time Select Register (OSTS)
Address: FFF4H, After reset: Undefined, R/W
Symbol
7
6
5
4
3
2
1
0
OSTS
0
OSTS1
OSTS0
OSTS1
OSTS0
Selection of oscillation stabilization time
0
2
10/fX (102.4
μs)
0
1
2
12/fX (409.6
μs)
1
0
2
15/fX (3.27 ms)
1
2
17/fX (13.1 ms)
Cautions 1. To set and then release the STOP mode, set the oscillation stabilization time as
follows.
Expected oscillation stabilization time of resonator
≤ Oscillation stabilization time
set by OSTS
2. The wait time after the STOP mode is released does not include the time from the
release of the STOP mode to the start of clock oscillation (“a” in the figure
below), regardless of whether STOP mode was released by reset signal
generation or interrupt generation.
STOP mode is released
Voltage
waveform
of X1 pin
a
3. The oscillation stabilization time that elapses on power application or after release
of reset is selected by the option byte. For details, refer to CHAPTER 15 OPTION
BYTE.
Remarks 1. ( ): fX = 10 MHz
2. Determine the oscillation stabilization time of the resonator by checking the
characteristics of the resonator to be used.
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UPD78F9512GR-JJG-A 功能描述:MCU 8BIT SGL CHIP 16PIN RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:78K0S/Kx1+ 標(biāo)準(zhǔn)包裝:38 系列:Encore!® XP® 核心處理器:eZ8 芯體尺寸:8-位 速度:5MHz 連通性:IrDA，UART/USART 外圍設(shè)備:欠壓檢測/復(fù)位，LED，POR，PWM，WDT 輸入/輸出數(shù):16 程序存儲器容量:4KB（4K x 8） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:1K x 8 電壓 - 電源 (Vcc/Vdd):2.7 V ~ 3.6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 105°C 封裝/外殼:20-SOIC（0.295"，7.50mm 寬） 包裝:管件 其它名稱:269-4116Z8F0413SH005EG-ND
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