參數(shù)資料
型號: UPD78F9512GR-JJG-A
廠商: Renesas Electronics America
文件頁數(shù): 175/175頁
文件大?。?/td> 0K
描述: MCU 8BIT SGL CHIP 16PIN
標準包裝: 400
系列: 78K0S/Kx1+
核心處理器: 78K0S
芯體尺寸: 8-位
速度: 10MHz
外圍設(shè)備: LVD,POR,PWM,WDT
輸入/輸出數(shù): 13
程序存儲器容量: 4KB(4K x 8)
程序存儲器類型: 閃存
RAM 容量: 128 x 8
電壓 - 電源 (Vcc/Vdd): 2 V ~ 5.5 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 16-SSOP(0.173",4.40mm 寬)
包裝: 托盤
CHAPTER 6 16-BIT TIMER/EVENT COUNTER 00
User’s Manual U16994EJ6V0UD
97
Remark
TM00:
16-bit timer counter 00
CR000:
16-bit timer capture/compare register 000
CR010:
16-bit timer capture/compare register 010
(2) Capture/compare control register 00 (CRC00)
This register controls the operation of the 16-bit capture/compare registers (CR000, CR010).
CRC00 is set by a 1-bit or 8-bit memory manipulation instruction.
Reset signal generation sets the value of CRC00 to 00H.
Figure 6-6. Format of Capture/Compare Control Register 00 (CRC00)
Address: FF62H After reset: 00H R/W
Symbol
7
6
5
4
3
2
1
0
CRC00
0
CRC002
CRC001
CRC000
CRC002
CR010 operating mode selection
0
Operate as compare register
1
Operate as capture register
CRC001
CR000 capture trigger selection
0
Capture on valid edge of TI010 pin
1
Capture on valid edge of TI000 pin by reverse phase
Note
CRC000
CR000 operating mode selection
0
Operate as compare register
1
Operate as capture register
Note
When the CRC001 bit value is 1, capture is not performed if both the rising and falling edges have been
selected as the valid edges of the TI000 pin.
Cautions 1. The timer operation must be stopped before setting CRC00.
2. When the clear & start mode entered on a match between TM00 and CR000 is selected by
16-bit timer mode control register 00 (TMC00), CR000 should not be specified as a
capture register.
3. To ensure the reliability of the capture operation, the capture trigger requires a pulse
longer than two cycles of the count clock selected by prescaler mode register 00
(PRM00) (refer to Figure 6-18).
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