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參數(shù)資料
| 型號(hào)： | V3020 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Ultra Low Power 1-Bit 32 kHz RTC |
| 中文描述： | 超低功耗1位32 kHz的時(shí)鐘 |
| 文件頁數(shù)： | 2/14頁 |
| 文件大?。?/td> | 470K |
| 代理商： | V3020 |
Handling Procedures
This device has built-in protection against high static voltages
or electric fields; however, it is advised that normal precautions
Electrical Characteristics
V
= 5.0V ± 10%, V = 0 V and T = -40 to +85 C, unless otherwise specified
DD
Stresses above these listed maximum ratings may cause
permanent damage to the device. Exposure beyond specified
operating conditions may affect device reliability or cause
malfunction.
Table 2
1)
The maximum operating temperature is confirmed by
sampling at initial device qualification. In production, all
o
devices are tested at +85 C. On request devices tested at
o
+125 C can be supplied.
2)
See Fig. 5
2
Absolute Maximum Ratings
Table 1
Parameter
Maximum voltage at V
DD
Minimum voltage at V
DD
Maximum voltage at any signal pin
Minimum voltage at any signal pin
Maximum storage temperature
Minimum storage temperature
Electrostatic discharge maximum
to MIL-STD-883C method 3015
Maximum soldering conditions
V
DDmax
V
DDmin
V
max
V
min
T
STOmax
T
STOmin
V
Smax
T
Smax
V
V
V
+ 7.0V
- 0.3V
+ 0.3V
DD
SS
SS
V
- 0.3V
SS
+150 C
O
-65 C
O
1000V
250 C x 10s
O
Symbol Conditions
be taken as for any other CMOS component. Unless otherwise
specified, proper operation can only occur when all terminal
voltages are kept within the supply voltage range. Unused
inputs must always be tied to a defined logic voltage level.
Operating Conditions
T
A
V
DD
-40
1.2
5.0
+125
5.5
O
C
V
V/
m
s
nF
kHz
pF
k
W
6
30
50
100
32.768
8.2
35
7
C
L
R
S
f
Parameter
Operating temperature
Logic supply voltage
Supply voltage dv/dt
(power-up & power-down)
Decoupling capacitor
Crystal Characteristics
2)
Frequency
Load capacitance
Series resistance
SymbolMin. Typ. Max. Units
1)
O
Total static supply
Total static supply
Dynamic current
Input / Output
Input logic low
Input logic high
Output logic low
Output logic high
Input leakage
Output tri-state leakage
on I/O pin
Oscillator
Starting voltage
Input capacitance on XI
Output capacitance on XO
Start-up time
Frequency stability
Frequency Measurement Mode
Current source on I/O pin
pulsed on/off @ 256 Hz
I
SS
I
SS
I
SS
V
IL
V
IH
V
OL
V
OH
I
IN
I
TS
V
STA
C
IN
C
OUT
T
STA
D
f/f
I
ONF
all outputs open, all inputs at V
DD
V
= 3.0 V, address 0 = 0
DD
T = 0 to +70 C
all outputs open, all inputs at V
DD,
V
= 5 V, address 0 = 0
DD
T = 0 to +70 C
I/O to V through 1M
W
RD = V , WR = V
,
CS = 4 MHz
address 0 = 0, read all 0
3.5
390
600
nA
nA
m
A
V
V
V
V
m
A
m
A
V
pF
pF
s
ppm/V
m
A
800
300
1.0
0.4
1
1
0.5
60
460
0.1
0.1
13
9
1
0.3
25
2.4
1.2
10
T = +25 C
T = +25 C
O
1.5
￡
V
￡
5.5 V, T = +25 C
DD
Table 3
Parameter
Symbol
Test Conditions
Min.
Typ.
Max.
Unit
CS high, addr.0, bit 0, high
V = 1 V
I = 4 mA
I
= 4 mA
OH
0.0 < V < 5.0 V
CS high, and address 0,
bit 0, low
DD
490 nA
600 nA
V3020
R
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