參數(shù)資料
型號: V53C16258L
廠商: Mosel Vitelic, Corp.
英文描述: HIGH PERFORMANCE 3.3 VOLT 256K X 16 EDO PAGE MODE CMOS DYNAMIC RAM OPTIONAL SELF REFRESH
中文描述: 高性能3.3伏256 × 16 EDO公司頁面模式的CMOS動態(tài)隨機存儲器可選自刷新
文件頁數(shù): 1/20頁
文件大?。?/td> 154K
代理商: V53C16258L
MOSEL VITELIC
1
V53C16258L
HIGH PERFORMANCE
3.3 VOLT 256K X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
OPTIONAL SELF REFRESH
V53C16258L Rev. 1.1 June 1999
HIGH PERFORMANCE
35
40
45
50
Max. RAS Access Time, (t
RAC
)
35 ns
40 ns
45 ns
50 ns
Max. Column Address Access Time, (t
CAA
)
18 ns
20 ns
22 ns
24 ns
Min. Fast Page Mode Cycle Time, (t
PC
)
14 ns
15 ns
17 ns
19 ns
Min. Read/Write Cycle Time, (t
RC
)
70 ns
75 ns
80 ns
90 ns
Features
I
256K x 16-bit organization
I
EDO Page Mode for a sustained data rate
of 71 MHz
I
RAS access time: 35, 40, 45, 50 ns
I
Dual CAS Inputs
I
Low power dissipation
I
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, and Self Refresh
I
Optional Self Refresh (V53C16258SL)
I
Refresh Interval: Standard: 512 cycles/8ms
I
Available in 40-pin 400 mil SOJ and
40/44L-pin 400 mil TSOP-II packages
I
Single +3.3V
±
0.3V Power Supply
I
TTL Interface
Description
The V53C16258L is a 262,144 x 16 bit high-
performance CMOS dynamic random access
memory. The V53C16258L offers Page mode with
Extended Data Output. An address, CAS and RAS
input capacitances are reduced to one quarter
when the x4 DRAM is used to construct the same
memory density. The V53C16258L has symmetric
address and accepts 512 cycle 8ms interval.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 512 x 16 bits,
within a page, with cycle times as short as 15ns.
The V53C16258L is ideally suited for a wide
variety of high performance portable computer
systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
K
T
35
40
45
50
Std.
0
°
C to 70
°
C
Blank
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