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參數(shù)資料
| 型號： | V53C318165A60 |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 3.3 VOLT 1M X 16 EDO PAGE MODE CMOS DYNAMIC RAM |
| 中文描述： | 3.3伏100萬× 16 EDO公司頁面模式的CMOS動態(tài)隨機(jī)存儲器 |
| 文件頁數(shù)： | 4/18頁 |
| 文件大?。?/td> | 266K |
| 代理商： | V53C318165A60 |
4
V53C318165A Rev. 1.0 January 1998
MOSEL VITELIC
V53C318165A
DC and Operating Characteristics
T
A
= 0
°
C to 70
°
C, V
CC
(1-2)
= 3.3 V
±
0.3 V, V
SS
= 0 V, t
T
= 2ns, unless otherwise specified.
Symbol
Parameter
Access
Time
V53C318165A
Unit
Test Conditions
Notes
Min.
Typ.
Max.
I
LI
Input Leakage Current
(any input pin)
–10
10
μ
A
V
SS
≤
V
IN
≤
V
CC
+ 0.3V
1
I
LO
Output Leakage Current
(for High-Z State)
–10
10
μ
A
V
RAS, CAS at V
SS
≤
V
OUT
≤
V
CC
+ 0.3V
IH
1
I
CC1
V
Operating
CC
Supply Current,
50
200
mA
t
RC
= t
RC
(min.)
2, 3, 4
60
180
70
160
I
CC2
V
TTL Standby
CC
Supply Current,
2
mA
RAS, CAS at V
other inputs
IH
≥
V
SS
I
CC3
V
RAS-Only Refresh
CC
Supply Current,
50
200
mA
t
RC
= t
RC
(min.)
2, 4
60
180
70
160
I
CC4
V
EDO Page Mode
Operation
CC
Supply Current,
50
90
mA
Minimum Cycle
2, 3, 4
60
75
70
60
I
CC5
V
CMOS Standby
CC
Supply Current,
1.0
mA
RAS
CAS
≥
≥
V
V
CC
– 0.2 V,
– 0.2 V
CC
1
I
CC6
Average Self Refresh Current
CBR cycle with t
(L-version only)
CAS held low, WE = V
Address and D
IN
or 0.2V
RAS
> t
RASS
min.,
CC
– 0.2V
– 0.2V,
= V
CC
1.0
mA
I
CC7
V
during CAS-before-RAS Refresh
CC
Supply Current,
50
200
mA
t
RC
= t
RC
(min)
2, 4
60
180
70
160
V
IL
Input Low Voltage
–0.5
0.8
V
1
V
IH
Input High Voltage
2
V
CC
+0.5
V
1
V
OL
Output Low Voltage
0.4
V
I
OL
= 2 mA
1
V
OH
Output High Voltage
2.4
V
I
OH
= –2 mA
1
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