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參數(shù)資料
| 型號： | V53C365165A |
| 廠商： | Mosel Vitelic, Corp. |
| 英文描述： | 3.3 Volt 4M X 16 EDO Page Mode CMOS Dynamic RAM(3.3V 4Mx16 EDO頁面模式CMOS動態(tài)RAM) |
| 中文描述： | 3.3伏特4米× 16 EDO公司頁面模式的CMOS動態(tài)RAM（3.3 4Mx16 EDO公司頁面模式的CMOS動態(tài)內存） |
| 文件頁數(shù)： | 1/26頁 |
| 文件大?。?/td> | 163K |
| 代理商： | V53C365165A |
MOSEL V ITELIC
1
V53C365165A
3.3 VOLT 4M X 16 EDO PAGE MODE
CMOS DYNAMIC RAM
V53C365165A Rev. 1.1 March 1998
V53C365165A
40
50
60
Max. RAS Access Time, (t
RAC
)
40 ns
50 ns
60 ns
Max. Column Address Access Time, (t
CAA
)
20 ns
25 ns
30 ns
Min. Extended Data Out Page Mode Cycle Time, (t
PC
)
16 ns
20 ns
25 ns
Min. Read/Write Cycle Time, (t
RC
)
69 ns
84 ns
104 ns
Features
I
4M x 16-bit organization
I
EDO Page Mode for a sustained data rate
of 63 MHz
I
RAS access time: 40, 50, 60 ns
I
Dual CAS Inputs
I
Low power dissipation
I
Read-Modify-Write, RAS-Only Refresh,
CAS-Before-RAS Refresh, Hidden Refresh
I
Refresh Interval: 4096 cycles/64 ms
I
Self refresh (L-version only)
I
Available in 50-pin 400 mil TSOP-II
I
Single +3.3 V
±
0.3 V Power Supply
I
LVTTL Interface
Description
The V53C365165A is a 4,194,304 x 16 bit high-
performance CMOS dynamic random access mem-
ory. The V53C365165A offers Page mode opera-
tion with Extended Data Output. The V53C365165A
has an symmetric address, 12-bit row and 10-bit
column.
All inputs are TTL compatible. EDO Page Mode
operation allows random access up to 1024 x 16
bits, within a page, with cycle times as short as 16
ns.
These features make the V53C365165A ideally
suited for a wide variety of high performance
computer systems and peripheral applications.
Device Usage Chart
Operating
Temperature
Range
Package Outline
Access Time (ns)
Power
Temperature
Mark
T
40
50
60
Std.
L
0
°
C to 70
°
C
Blank
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